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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-11-07 09:32:16 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-11-07 09:32:16 +0100
commit3285d4ca197928a048d3dda86751b5d26e6e0e86 (patch)
treec1ab908fb4fac09839c672c765b98a0512d1e9d1 /arch/arm/cpu/arm926ejs/mxs/start.S
parentc0e5dd88c438a41bf180dde0c2dc4c67dcd8058d (diff)
parentc93addb5635630847e8a33f6dba4afef78a6d180 (diff)
downloadu-boot-imx-3285d4ca197928a048d3dda86751b5d26e6e0e86.zip
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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mxs/start.S')
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/start.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S
index 3e454ae..5de2bad 100644
--- a/arch/arm/cpu/arm926ejs/mxs/start.S
+++ b/arch/arm/cpu/arm926ejs/mxs/start.S
@@ -150,6 +150,15 @@ IRQ_STACK_START_IN:
_reset:
/*
+ * If the CPU is configured in "Wait JTAG connection mode", the stack
+ * pointer is not configured and is zero. This will cause crash when
+ * trying to push data onto stack right below here. Load the SP and make
+ * it point to the end of OCRAM if the SP is zero.
+ */
+ cmp sp, #0x00000000
+ ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
+
+ /*
* Store all registers on old stack pointer, this will allow us later to
* return to the BootROM and let the BootROM load U-Boot into RAM.
*