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authorFabio Estevam <fabio.estevam@freescale.com>2012-04-23 08:30:50 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:35 +0200
commit148ca64f327a89ef77e84756f5d351af33e59b64 (patch)
tree9d2c2d1c16ced71cc1396f708739ed44f6e9c43b /arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
parent79cb14ab39f970b85204ab1b2f796b02bb65335d (diff)
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spi: mxs: Allow other chip selects to work
MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2. Currently only SS0 is supported in the mxs_spi driver. Allow all the three chip select to work by selecting the desired one in bits 20 and 21 of the HW_SSP_CTRL0 register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c')
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