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authorRobert Delien <robert@delien.nl>2012-02-26 12:15:05 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-03-26 23:09:24 +0200
commitb228e14e9653fe4ead0f39a7a879d1a50e61321a (patch)
tree7cd4c42ddc393a14b19b29d7573d2087403cbe28 /arch/arm/cpu/arm926ejs/mx28/clock.c
parent40083c52f7a817e6a5c3624cb5590f582f9110fc (diff)
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Renamed mx28_register to mx28_register_32 to prepare for mx28_register_8
This patch renames mx28_register to mx28_register_32 in order to prepare for the introduction of an 8-bit register, mx28_register_8. Signed-off-by: Robert Delien <robert@delien.nl> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mx28/clock.c')
-rw-r--r--arch/arm/cpu/arm926ejs/mx28/clock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx28/clock.c b/arch/arm/cpu/arm926ejs/mx28/clock.c
index f698506..9d3a018 100644
--- a/arch/arm/cpu/arm926ejs/mx28/clock.c
+++ b/arch/arm/cpu/arm926ejs/mx28/clock.c
@@ -223,7 +223,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
return;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE);
while (readl(clkreg) & CLKCTRL_SSP_CLKGATE)
@@ -272,7 +272,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
return XTAL_FREQ_KHZ;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register));
+ (ssp * sizeof(struct mx28_register_32));
tmp = readl(clkreg) & CLKCTRL_SSP_DIV_MASK;