Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  ARM: Add Calxeda Highbank platform
  dkb: make mmc command as default enabled
  Marvell: dkb: add mmc support
  ARM: pantheon: add mmc definition
  davinci: remove config.mk file from the sources
  ARM:AM33XX: Add support for TI AM335X EVM
  ARM:AM33XX: Added timer support
  ARM:AM33XX: Add emif/ddr support
  ARM:AM33XX: Add clock definitions
  ARM:AM33XX: Added support for AM33xx
  omap3/emif4: fix registers definition
  davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
  davinci: emac: add support for more than 1 PHYs
  davinci: emac: add new features to autonegotiate for EMAC
  da850evm: Move LPSC configuration to board_early_init_f()
  omap4_panda: Build in cmd_gpio support on panda
  omap: Don't use gpio_free to change direction to input
  mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset
  OMAP3: overo : Add environment variable optargs to bootargs
  OMAP3: overo: Move ethernet CS4 configuration to execute based on board id
  OMAP3: overo : Use ttyO2 instead of ttyS2.
  da830: add support for NAND boot mode
  dm36x: revert cache disable patch
  dm644X: revert cache disable patch
  devkit8000: Add malloc space
  omap: spl: fix build break due to changes in FAT
  OMAP3 SPL: Provide weak omap_rev_string
  omap: beagle: Use ubifs instead of jffs2 for nand boot
  omap: overo: Disable pull-ups on camera PCLK, HS and VS signals
  omap: overo: Configure mux for gpio10
  SPL: Add DMA library
  omap3: Add interface for omap3 DMA
  omap3: Add DMA register accessors
  omap3: Add Base register for DMA
  arm, davinci: add missing LSPC define for MMC/SD1
  U-Boot/SPL: omap4: Make ddr pre-calculated timings as default.
  DaVinci: correct MDSTAT.STATE mask
  omap4: splitting padconfs into common, 4430 and 4460
  omap4: adding revision detection for 4460 ES1.1
  omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL
  gplug: fixed build error as a result of code cleanup patch
  kirkwood_spi: add dummy spi_init()
  gpio: mvmfp: reduce include platform file
  ARM: orion5x: reduce dependence of including platform file
  serial: reduce include platform file for marvell chip
  ARM: kirkwood: reduce dependence of including platform file
  ARM: armada100: reduce dependence of including platform file
  ARM: pantheon: reduce dependence of including platform file
  Armada100: Add env storage support for Marvell gplugD
  Armada100: Add SPI flash support for Marvell gplugD
  Armada100: Add SPI support for Marvell gplugD
  SPI: Add SPI driver support for Marvell Armada100
  dreamplug: initial board support.
  imx: fix coding style
  misc: pmic: drop old Freescale's pmic driver
  MX31: mx31pdk: use new pmic driver
  MX31: mx31ads: use new pmic driver
  MX31: mx31_litekit: use new pmic driver
  MX5: mx53evk: use new pmic driver
  MX5: mx51evk: use new pmic driver
  MX35: mx35pdk: use new pmic driver
  misc: pmic: addI2C  support to pmic_fsl driver
  misc: pmic: use I2C_SET_BUS in pmic I2C
  MX5: efikamx/efikasb: use new pmic driver
  MX3: qong: use new pmic driver
  RTC: Switch mc13783 to generic pmic code
  MX5: vision2: use new pmic driver
  misc: pmic: Freescale PMIC switches to generic PMIC driver
  misc:pmic:samsung Enable PMIC driver at GONI target
  misc:pmic:max8998 MAX8998 support at a new PMIC driver.
  misc:pmic:core New generic PMIC driver
  mx31pdk: Remove unneeded config
  mx31: provide readable WEIM CS accessor
  MX51: vision2: Set global macros
  I2C: Add i2c_get/set_speed() to mxc_i2c.c
  ARM: Update mach-types
  devkit8000: Add config to enable SPL MMC boot
  devkit8000: protect board_mmc_init
  arm, post: add missing post_time_ms for arm
  cosmetic, post: Codingstyle cleanup
  arm, logbuffer: make it compileclean
  tegra2: Enable MMC for Seaboard
  tegra2: Add more pinmux functions
  tegra2: Rename PIN_ to PINGRP_
  tegra2: Add more clock functions
  tegra2: Clean up board code a little
  tegra2: Rename CLOCK_PLL_ID to CLOCK_ID

1 files changed, 55 insertions, 55 deletions

diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 8e60a26..c045a0b 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -39,7 +39,7 @@
  *  f = 2 * f_ref * --------------------
  *                        pd + 1
  */
-static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
 {
 	unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
 	    & CCM_PLL_MFI_MASK;
@@ -52,57 +52,57 @@ static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref)
 
 	mfi = mfi <= 5 ? 5 : mfi;
 
-	return lldiv (2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
+	return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
 		      (mfd + 1) * (pd + 1));
 }
 
-static ulong imx_get_mpllclk (void)
+static ulong imx_get_mpllclk(void)
 {
 	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
 	ulong fref = 24000000;
 
-	return imx_decode_pll (readl (&ccm->mpctl), fref);
+	return imx_decode_pll(readl(&ccm->mpctl), fref);
 }
 
-ulong imx_get_armclk (void)
+ulong imx_get_armclk(void)
 {
 	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-	ulong cctl = readl (&ccm->cctl);
-	ulong fref = imx_get_mpllclk ();
+	ulong cctl = readl(&ccm->cctl);
+	ulong fref = imx_get_mpllclk();
 	ulong div;
 
 	if (cctl & CCM_CCTL_ARM_SRC)
-		fref = lldiv ((fref * 3), 4);
+		fref = lldiv((fref * 3), 4);
 
 	div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
 	       & CCM_CCTL_ARM_DIV_MASK) + 1;
 
-	return lldiv (fref, div);
+	return lldiv(fref, div);
 }
 
-ulong imx_get_ahbclk (void)
+ulong imx_get_ahbclk(void)
 {
 	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-	ulong cctl = readl (&ccm->cctl);
-	ulong fref = imx_get_armclk ();
+	ulong cctl = readl(&ccm->cctl);
+	ulong fref = imx_get_armclk();
 	ulong div;
 
 	div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
 	       & CCM_CCTL_AHB_DIV_MASK) + 1;
 
-	return lldiv (fref, div);
+	return lldiv(fref, div);
 }
 
-ulong imx_get_perclk (int clk)
+ulong imx_get_perclk(int clk)
 {
 	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-	ulong fref = imx_get_ahbclk ();
+	ulong fref = imx_get_ahbclk();
 	ulong div;
 
-	div = readl (&ccm->pcdr[CCM_PERCLK_REG (clk)]);
-	div = ((div >> CCM_PERCLK_SHIFT (clk)) & CCM_PERCLK_MASK) + 1;
+	div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
+	div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
 
-	return lldiv (fref, div);
+	return lldiv(fref, div);
 }
 
 u32 get_cpu_rev(void)
@@ -153,7 +153,7 @@ static char *get_reset_cause(void)
 
 }
 
-int print_cpuinfo (void)
+int print_cpuinfo(void)
 {
 	char buf[32];
 	u32 cpurev = get_cpu_rev();
@@ -161,22 +161,22 @@ int print_cpuinfo (void)
 	printf("CPU:   Freescale i.MX25 rev%d.%d%s at %s MHz\n",
 		(cpurev & 0xF0) >> 4, (cpurev & 0x0F),
 		((cpurev & 0x8000) ? " unknown" : ""),
-		strmhz (buf, imx_get_armclk ()));
+		strmhz(buf, imx_get_armclk()));
 	printf("Reset cause: %s\n\n", get_reset_cause());
 	return 0;
 }
 #endif
 
-int cpu_eth_init (bd_t * bis)
+int cpu_eth_init(bd_t *bis)
 {
 #if defined(CONFIG_FEC_MXC)
 	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
 	ulong val;
 
-	val = readl (&ccm->cgr0);
+	val = readl(&ccm->cgr0);
 	val |= (1 << 23);
-	writel (val, &ccm->cgr0);
-	return fecmxc_initialize (bis);
+	writel(val, &ccm->cgr0);
+	return fecmxc_initialize(bis);
 #else
 	return 0;
 #endif
@@ -186,10 +186,10 @@ int cpu_eth_init (bd_t * bis)
  * Initializes on-chip MMC controllers.
  * to override, implement board_mmc_init()
  */
-int cpu_mmc_init (bd_t * bis)
+int cpu_mmc_init(bd_t *bis)
 {
 #ifdef CONFIG_MXC_MMC
-	return mxc_mmc_init (bis);
+	return mxc_mmc_init(bis);
 #else
 	return 0;
 #endif
@@ -206,7 +206,7 @@ void mx25_uart1_init_pins(void)
 
 	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
 	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
-	muxmode0 = MX25_PIN_MUX_MODE (0);
+	muxmode0 = MX25_PIN_MUX_MODE(0);
 	/*
 	 * set up input pins with hysteresis and 100K pull-ups
 	 */
@@ -227,25 +227,25 @@ void mx25_uart1_init_pins(void)
 
 	/* UART1 */
 	/* rxd */
-	writel (muxmode0, &muxctl->pad_uart1_rxd);
-	writel (inpadctl, &padctl->pad_uart1_rxd);
+	writel(muxmode0, &muxctl->pad_uart1_rxd);
+	writel(inpadctl, &padctl->pad_uart1_rxd);
 
 	/* txd */
-	writel (muxmode0, &muxctl->pad_uart1_txd);
-	writel (outpadctl, &padctl->pad_uart1_txd);
+	writel(muxmode0, &muxctl->pad_uart1_txd);
+	writel(outpadctl, &padctl->pad_uart1_txd);
 
 	/* rts */
-	writel (muxmode0, &muxctl->pad_uart1_rts);
-	writel (outpadctl, &padctl->pad_uart1_rts);
+	writel(muxmode0, &muxctl->pad_uart1_rts);
+	writel(outpadctl, &padctl->pad_uart1_rts);
 
 	/* cts */
-	writel (muxmode0, &muxctl->pad_uart1_cts);
-	writel (inpadctl, &padctl->pad_uart1_cts);
+	writel(muxmode0, &muxctl->pad_uart1_cts);
+	writel(inpadctl, &padctl->pad_uart1_cts);
 }
 #endif /* CONFIG_MXC_UART */
 
 #ifdef CONFIG_FEC_MXC
-void mx25_fec_init_pins (void)
+void mx25_fec_init_pins(void)
 {
 	struct iomuxc_mux_ctl *muxctl;
 	struct iomuxc_pad_ctl *padctl;
@@ -256,7 +256,7 @@ void mx25_fec_init_pins (void)
 
 	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
 	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
-	muxmode0 = MX25_PIN_MUX_MODE (0);
+	muxmode0 = MX25_PIN_MUX_MODE(0);
 	inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS
 	    | MX25_PIN_PAD_CTL_PKE
 	    | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
@@ -275,40 +275,40 @@ void mx25_fec_init_pins (void)
 	outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
 
 	/* FEC_TX_CLK */
-	writel (muxmode0, &muxctl->pad_fec_tx_clk);
-	writel (inpadctl_100kpd, &padctl->pad_fec_tx_clk);
+	writel(muxmode0, &muxctl->pad_fec_tx_clk);
+	writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk);
 
 	/* FEC_RX_DV */
-	writel (muxmode0, &muxctl->pad_fec_rx_dv);
-	writel (inpadctl_100kpd, &padctl->pad_fec_rx_dv);
+	writel(muxmode0, &muxctl->pad_fec_rx_dv);
+	writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv);
 
 	/* FEC_RDATA0 */
-	writel (muxmode0, &muxctl->pad_fec_rdata0);
-	writel (inpadctl_100kpd, &padctl->pad_fec_rdata0);
+	writel(muxmode0, &muxctl->pad_fec_rdata0);
+	writel(inpadctl_100kpd, &padctl->pad_fec_rdata0);
 
 	/* FEC_TDATA0 */
-	writel (muxmode0, &muxctl->pad_fec_tdata0);
-	writel (outpadctl, &padctl->pad_fec_tdata0);
+	writel(muxmode0, &muxctl->pad_fec_tdata0);
+	writel(outpadctl, &padctl->pad_fec_tdata0);
 
 	/* FEC_TX_EN */
-	writel (muxmode0, &muxctl->pad_fec_tx_en);
-	writel (outpadctl, &padctl->pad_fec_tx_en);
+	writel(muxmode0, &muxctl->pad_fec_tx_en);
+	writel(outpadctl, &padctl->pad_fec_tx_en);
 
 	/* FEC_MDC */
-	writel (muxmode0, &muxctl->pad_fec_mdc);
-	writel (outpadctl, &padctl->pad_fec_mdc);
+	writel(muxmode0, &muxctl->pad_fec_mdc);
+	writel(outpadctl, &padctl->pad_fec_mdc);
 
 	/* FEC_MDIO */
-	writel (muxmode0, &muxctl->pad_fec_mdio);
-	writel (inpadctl_22kpu, &padctl->pad_fec_mdio);
+	writel(muxmode0, &muxctl->pad_fec_mdio);
+	writel(inpadctl_22kpu, &padctl->pad_fec_mdio);
 
 	/* FEC_RDATA1 */
-	writel (muxmode0, &muxctl->pad_fec_rdata1);
-	writel (inpadctl_100kpd, &padctl->pad_fec_rdata1);
+	writel(muxmode0, &muxctl->pad_fec_rdata1);
+	writel(inpadctl_100kpd, &padctl->pad_fec_rdata1);
 
 	/* FEC_TDATA1 */
-	writel (muxmode0, &muxctl->pad_fec_tdata1);
-	writel (outpadctl, &padctl->pad_fec_tdata1);
+	writel(muxmode0, &muxctl->pad_fec_tdata1);
+	writel(outpadctl, &padctl->pad_fec_tdata1);
 
 }