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author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:28:53 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:05 -0700 |
commit | 19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb (patch) | |
tree | b5d9181495ded2c5d57752c2a96abdd5b404452a /arch/arm/cpu/arm720t | |
parent | 07bbd48b4785f28b41ceeab4337d7690837e6ec1 (diff) | |
download | u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.zip u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.tar.gz u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.tar.bz2 |
ARM: tegra: use apb_misc.h in more places
Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers currently uses struct pmux_tri_ctlr, which is intended to
be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl,
which is intended to be a definition of the miscellaneous registers.
Convert all such code to use struct apb_misc_pp_ctrl, since struct
pmux_tri_ctlr goes away in the next patch.
This requires adding a missing field definition to struct
apb_misc_pp_ctrl, and moving the header into a more common location.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/arm720t')
-rw-r--r-- | arch/arm/cpu/arm720t/tegra-common/spl.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm720t/tegra-common/spl.c b/arch/arm/cpu/arm720t/tegra-common/spl.c index 5171a8f..3479541 100644 --- a/arch/arm/cpu/arm720t/tegra-common/spl.c +++ b/arch/arm/cpu/arm720t/tegra-common/spl.c @@ -13,16 +13,18 @@ #include <asm/arch/clock.h> #include <asm/arch/pinmux.h> #include <asm/arch/tegra.h> +#include <asm/arch-tegra/apb_misc.h> #include <asm/arch-tegra/board.h> #include <asm/arch/spl.h> #include "cpu.h" void spl_board_init(void) { - struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; + struct apb_misc_pp_ctlr *apb_misc = + (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE; /* enable JTAG */ - writel(0xC0, &pmt->pmt_cfg_ctl); + writel(0xC0, &apb_misc->cfg_ctl); board_init_uart_f(); |