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authorStephen Warren <swarren@nvidia.com>2014-02-03 14:03:25 -0700
committerTom Warren <twarren@nvidia.com>2014-03-05 16:59:08 -0700
commitf3026c16836b0bdc2b4a170f29005d834a748c5e (patch)
tree6939a6519bfd0785dbabf817703114be7de6886e /arch/arm/cpu/arm720t/tegra124
parentcd7efc2a947b30a2047b248f66ddfa8b182fda64 (diff)
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ARM: tegra: fix pmc_pwrgate_timer_mult register definition
Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and Tegra124. Reflect this in pmc.h. Also, simply write the whole of the register in start_cpu() rather than doing a read-modify-write; the register is simple enough that the code can easily construct the entire desired value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/arm720t/tegra124')
-rw-r--r--arch/arm/cpu/arm720t/tegra124/cpu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c b/arch/arm/cpu/arm720t/tegra124/cpu.c
index c03aaf1..97f5928 100644
--- a/arch/arm/cpu/arm720t/tegra124/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra124/cpu.c
@@ -252,8 +252,8 @@ void start_cpu(u32 reset_vector)
tegra124_init_clocks();
/* Set power-gating timer multiplier */
- clrbits_le32(&pmc->pmc_pwrgate_timer_mult, TIMER_MULT_MASK);
- setbits_le32(&pmc->pmc_pwrgate_timer_mult, MULT_8);
+ writel((MULT_8 << TIMER_MULT_SHIFT) | (MULT_8 << TIMER_MULT_CPU_SHIFT),
+ &pmc->pmc_pwrgate_timer_mult);
enable_cpu_power_rail();
enable_cpu_clocks();