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| author | Alexey Brodkin <abrodkin@synopsys.com> | 2015-02-19 18:40:58 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2015-04-03 09:47:49 +0300 |
| commit | 4d93617d87285f01f450a30584520369ff3585d2 (patch) | |
| tree | 8ef5ad51ed1e485b6465db58f2c4bc73840a46bd /arch/arc/cpu/arcv2/ivt.S | |
| parent | ae4a351ad9e3b800e8eb55b27c302d8be256540e (diff) | |
| download | u-boot-imx-4d93617d87285f01f450a30584520369ff3585d2.zip u-boot-imx-4d93617d87285f01f450a30584520369ff3585d2.tar.gz u-boot-imx-4d93617d87285f01f450a30584520369ff3585d2.tar.bz2 | |
arc: merge common start-up code between ARC and ARCv2
Even though ARCompact and ARCv2 are not binary compatible most of
assembly instructions are used in both. With this change we'll get rid
of duplicate code.
Still IVTs are implemented differently so we're keeping them in separate
files.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch/arc/cpu/arcv2/ivt.S')
| -rw-r--r-- | arch/arc/cpu/arcv2/ivt.S | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arc/cpu/arcv2/ivt.S b/arch/arc/cpu/arcv2/ivt.S new file mode 100644 index 0000000..d110b5b --- /dev/null +++ b/arch/arc/cpu/arcv2/ivt.S @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.section .ivt, "a",@progbits +.align 4 + /* Critical system events */ +.word _start /* 0 - 0x000 */ +.word memory_error /* 1 - 0x008 */ +.word instruction_error /* 2 - 0x010 */ + + /* Exceptions */ +.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */ +.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */ +.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */ +.word EV_TLBProtV /* 0x118, Protection Violation (0x23) + or Misaligned Access */ +.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */ +.word EV_Trap /* 0x128, Trap exception (0x25) */ +.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */ + + /* Device interrupts */ +.rept 29 + j interrupt_handler /* 3:31 - 0x018:0xF8 */ +.endr |