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| author | Marek Vasut <marex@denx.de> | 2015-08-01 19:45:24 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:26 +0200 |
| commit | 60bd0df018f5f1b6baa41d782b3b9b7065f04b68 (patch) | |
| tree | d8884b48f110e6a5fb1578976c2df4c5c4090bde /MAKEALL | |
| parent | 067c853fe6ad67217f444428ccbfa038dfa8522d (diff) | |
| download | u-boot-imx-60bd0df018f5f1b6baa41d782b3b9b7065f04b68.zip u-boot-imx-60bd0df018f5f1b6baa41d782b3b9b7065f04b68.tar.gz u-boot-imx-60bd0df018f5f1b6baa41d782b3b9b7065f04b68.tar.bz2 | |
ddr: altera: sdram: Clean up set_sdr_dram_timing*()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Merge set_sdr_dram_timing{1,2,3,4,lowpwr}() into single function
set_sdr_dram_timing() , since there's no point in keeping all this
stuff separate anymore.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'MAKEALL')
0 files changed, 0 insertions, 0 deletions