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author | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-05-25 18:41:50 +0800 |
---|---|---|
committer | Zhang Jiejing <jiejing.zhang@freescale.com> | 2012-05-29 17:57:00 +0800 |
commit | f5d0383f915bd4d4d211d9958d7819b284276483 (patch) | |
tree | d6a8a9f9bd60d92a654070f9f134c7a39ce1ff21 | |
parent | b704d5b48d36d7bfcd4d46c21c8daf7f89352204 (diff) | |
download | u-boot-imx-f5d0383f915bd4d4d211d9958d7819b284276483.zip u-boot-imx-f5d0383f915bd4d4d211d9958d7819b284276483.tar.gz u-boot-imx-f5d0383f915bd4d4d211d9958d7819b284276483.tar.bz2 |
ENGR00210918-1 android: add mx6sl android support
- add android build config for mx6sl_arm2 board.
- add gpio support for mx6sl
- add boot image support
- add android recovery support
- add fastboot support, but fastboot cannot transfer file.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
-rw-r--r-- | Makefile | 1 | ||||
-rw-r--r-- | board/freescale/common/recovery.c | 2 | ||||
-rw-r--r-- | board/freescale/mx6sl_arm2/mx6sl_arm2.c | 33 | ||||
-rw-r--r-- | drivers/gpio/mxc_gpio.c | 3 | ||||
-rw-r--r-- | drivers/usb/gadget/imx_udc.c | 4 | ||||
-rw-r--r-- | include/configs/mx6sl_arm2.h | 1 | ||||
-rw-r--r-- | include/configs/mx6sl_arm2_android.h | 74 | ||||
-rw-r--r-- | include/usb/imx_udc.h | 3 |
8 files changed, 116 insertions, 5 deletions
@@ -3347,6 +3347,7 @@ mx6q_sabreauto_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx6q_sabreauto freescale mx6 mx6sl_arm2_config \ +mx6sl_arm2_android_config \ mx6sl_arm2_mfg_config \ mx6sl_arm2_iram_config : unconfig @[ -z "$(findstring iram_,$@)" ] || \ diff --git a/board/freescale/common/recovery.c b/board/freescale/common/recovery.c index e63a1d4..73f091b 100644 --- a/board/freescale/common/recovery.c +++ b/board/freescale/common/recovery.c @@ -85,7 +85,7 @@ void setup_recovery_env(void) boot_cmd = supported_reco_envs[bootdev].cmd; if (boot_cmd == NULL) { - printf("Unsupported bootup device for recovery\n"); + printf("Unsupported bootup device for recovery: dev: %d\n", bootdev); return; } diff --git a/board/freescale/mx6sl_arm2/mx6sl_arm2.c b/board/freescale/mx6sl_arm2/mx6sl_arm2.c index cff96c0..60a263f 100644 --- a/board/freescale/mx6sl_arm2/mx6sl_arm2.c +++ b/board/freescale/mx6sl_arm2/mx6sl_arm2.c @@ -44,11 +44,23 @@ #include <fsl_esdhc.h> #endif +#ifdef CONFIG_MXC_GPIO +#include <asm/gpio.h> +#include <asm/arch/gpio.h> +#endif + +#ifdef CONFIG_ANDROID_RECOVERY +#include <recovery.h> +#endif + DECLARE_GLOBAL_DATA_PTR; static u32 system_rev; static enum boot_device boot_dev; +#define USB_OTG_PWR IMX_GPIO_NR(4, 0) +#define USB_H1_PWR IMX_GPIO_NR(4, 2) + static inline void setup_boot_device(void) { uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4); @@ -757,3 +769,24 @@ int checkboard(void) } return 0; } + +#ifdef CONFIG_ANDROID_RECOVERY +int check_recovery_cmd_file(void) +{ + return check_and_clean_recovery_flag(); +} +#endif + + +#ifdef CONFIG_IMX_UDC +void udc_pins_setting(void) +{ + /* USB_OTG_PWR */ + mxc_iomux_v3_setup_pad(MX6SL_PAD_KEY_COL4__GPIO_4_0); + mxc_iomux_v3_setup_pad(MX6SL_PAD_KEY_COL5__GPIO_4_2); + /* USB_OTG_PWR = 0 */ + gpio_direction_output(USB_OTG_PWR, 0); + /* USB_H1_POWER = 1 */ + gpio_direction_output(USB_H1_PWR, 1); +} +#endif diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index dde079f..9ad2df0 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -40,7 +40,8 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) +#if defined(CONFIG_MX51) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) \ + || defined(CONFIG_MX6DL) || defined(CONFIG_MX6SL) [3] = GPIO4_BASE_ADDR, #if !defined(CONFIG_MX51) [4] = GPIO5_BASE_ADDR, diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c index 7745760..c3796d3 100644 --- a/drivers/usb/gadget/imx_udc.c +++ b/drivers/usb/gadget/imx_udc.c @@ -464,7 +464,7 @@ static void usb_set_mode_device(void) ; DBG("DOORE RESET END\n"); -#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) || defined(CONFIG_MX6SL) reset_usb_phy1(); #endif DBG("init core to device mode\n"); @@ -812,7 +812,7 @@ int mxc_udc_init(void) set_usboh3_clk(); set_usb_phy1_clk(); enable_usboh3_clk(1); -#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) || defined(CONFIG_MX6SL) udc_disable_over_current(); #endif enable_usb_phy1_clk(1); diff --git a/include/configs/mx6sl_arm2.h b/include/configs/mx6sl_arm2.h index 5b0cda1..6485609 100644 --- a/include/configs/mx6sl_arm2.h +++ b/include/configs/mx6sl_arm2.h @@ -171,6 +171,7 @@ #define CONFIG_IPADDR 192.168.1.103 #define CONFIG_SERVERIP 192.168.1.101 #define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_MXC_GPIO /* * OCOTP Configs diff --git a/include/configs/mx6sl_arm2_android.h b/include/configs/mx6sl_arm2_android.h new file mode 100644 index 0000000..5afb8ac --- /dev/null +++ b/include/configs/mx6sl_arm2_android.h @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * + * Configuration settings for the MX6Q Sabre Lite2 Freescale board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef MX6SL_ARM2_ANDROID_H +#define MX6SL_ARM2_ANDROID_H + +#include <configs/mx6sl_arm2.h> + +#if 0 +#define CONFIG_USB_DEVICE +#define CONFIG_IMX_UDC 1 +#define CONFIG_FASTBOOT 1 +#define CONFIG_FASTBOOT_STORAGE_EMMC_SATA +#define CONFIG_FASTBOOT_VENDOR_ID 0x18d1 +#define CONFIG_FASTBOOT_PRODUCT_ID 0x0d02 +#define CONFIG_FASTBOOT_BCD_DEVICE 0x311 +#define CONFIG_FASTBOOT_MANUFACTURER_STR "Freescale" +#define CONFIG_FASTBOOT_PRODUCT_NAME_STR "i.mx6q Sabre Smart Device" +#define CONFIG_FASTBOOT_INTERFACE_STR "Android fastboot" +#define CONFIG_FASTBOOT_CONFIGURATION_STR "Android fastboot" +#define CONFIG_FASTBOOT_SERIAL_NUM "12345" +#define CONFIG_FASTBOOT_SATA_NO 0 +#define CONFIG_FASTBOOT_TRANSFER_BUF 0x30000000 +#define CONFIG_FASTBOOT_TRANSFER_BUF_SIZE 0x10000000 /* 256M byte */ +#endif + +#define CONFIG_CMD_BOOTI +#define CONFIG_ANDROID_RECOVERY +/* which mmc bus is your main storage ? */ +#define CONFIG_ANDROID_MAIN_MMC_BUS 0 +#define CONFIG_ANDROID_BOOT_PARTITION_MMC 1 +#define CONFIG_ANDROID_SYSTEM_PARTITION_MMC 5 +#define CONFIG_ANDROID_RECOVERY_PARTITION_MMC 2 +#define CONFIG_ANDROID_CACHE_PARTITION_MMC 6 + + +#define CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC NULL +#define CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC \ + "booti mmc0 recovery" +#define CONFIG_INITRD_TAG + +#undef CONFIG_LOADADDR +#undef CONFIG_RD_LOADADDR +#undef CONFIG_EXTRA_ENV_SETTINGS + +#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ +#define CONFIG_RD_LOADADDR 0x81000000 + +#define CONFIG_INITRD_TAG + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "ethprime=FEC0\0" \ + "fastboot_dev=mmc0\0" \ + "bootcmd=booti mmc0\0" +#endif diff --git a/include/usb/imx_udc.h b/include/usb/imx_udc.h index c3238e0..3809640 100644 --- a/include/usb/imx_udc.h +++ b/include/usb/imx_udc.h @@ -33,7 +33,8 @@ #define USB_OTGREGS_BASE (OTG_BASE_ADDR + 0x000) #define USB_H1REGS_BASE (OTG_BASE_ADDR + 0x200) #define USB_H2REGS_BASE (OTG_BASE_ADDR + 0x400) -#if (defined CONFIG_MX6Q || defined CONFIG_MX53 || defined CONFIG_MX51 || CONFIG_MX50) +#if (defined CONFIG_MX51 || defined CONFIG_MX50 || defined CONFIG_MX6Q \ + || defined CONFIG_MX53 || defined CONFIG_MX6DL || defined CONFIG_MX6SL) #define USB_H3REGS_BASE (OTG_BASE_ADDR + 0x600) #define USB_OTHERREGS_BASE (OTG_BASE_ADDR + 0x800) #else |