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authorBin Meng <bmeng.cn@gmail.com>2015-06-03 09:20:05 +0800
committerSimon Glass <sjg@chromium.org>2015-06-04 03:03:18 -0600
commitf2653e8dd92229328480da35c26e6f9fbfec4381 (patch)
tree774cce23bd148a5a3d3e831d0823907f7d8486d9
parent683b09d7837a71fb4c5dd53919c6afa4d800e60e (diff)
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x86: coreboot: Control I/O port 0xb2 writing via device tree
Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes U-Boot to hang on QEMU q35 target. We introduce a config option in the device tree "u-boot,no-apm-finalize" under /config node if we don't want to do that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/cpu/coreboot/coreboot.c12
-rw-r--r--arch/x86/dts/qemu-x86_q35.dts1
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index c3dfd28..c4cac04 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <fdtdec.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/msr.h>
@@ -74,9 +75,14 @@ void board_final_cleanup(void)
mtrr_close(&state);
}
- /* Issue SMI to Coreboot to lock down ME and registers */
- printf("Finalizing Coreboot\n");
- outb(0xcb, 0xb2);
+ if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+ /*
+ * Issue SMI to coreboot to lock down ME and registers
+ * when allowed via device tree
+ */
+ printf("Finalizing coreboot\n");
+ outb(0xcb, 0xb2);
+ }
}
int misc_init_r(void)
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 6c89283..02a483c 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -15,6 +15,7 @@
config {
silent_console = <0>;
+ u-boot,no-apm-finalize;
};
chosen {