AT91: add TOP9000 support

Adds support for the EMK TOP9000 CPU Module which is
based on ATMELs ARM926EJS AT91SAM9XE SoC.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>

6 files changed, 723 insertions, 1 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index f47fca5..0590ad9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -310,10 +310,11 @@ Tirumala Marri <tmarri@apm.com>
 
 	bluestone       APM821XX
 
-Reinhard Meyer <r.meyer@emk-elektronik.de>
+Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
 
 	TOP860		MPC860T
 	TOP5200		MPC5200
+	TOP9000		ARM926EJS (AT91SAM9xxx SoC)
 
 Tolunay Orkun <torkun@nextio.com>
 
diff --git a/board/emk/top9000/Makefile b/board/emk/top9000/Makefile
new file mode 100644
index 0000000..9b28048
--- /dev/null
+++ b/board/emk/top9000/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2010
+# Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	+= top9000.o
+COBJS-$(CONFIG_ATMEL_SPI)	+= spi.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/emk/top9000/spi.c b/board/emk/top9000/spi.c
new file mode 100644
index 0000000..b468948
--- /dev/null
+++ b/board/emk/top9000/spi.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_spi.h>
+#include <asm/arch/gpio.h>
+#include <spi.h>
+
+static const struct {
+	u32	port;
+	u32	bit;
+} cs_to_portbit[2][4] = {
+	{{AT91_PIO_PORTA,  3}, {AT91_PIO_PORTC, 11},
+			{AT91_PIO_PORTC, 16}, {AT91_PIO_PORTC, 17} },
+	{{AT91_PIO_PORTB,  3}, {AT91_PIO_PORTC,  5},
+			{AT91_PIO_PORTC,  4}, {AT91_PIO_PORTC,  3} }
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	debug("spi_cs_is_valid: bus=%u cs=%u\n", bus, cs);
+	if (bus < 2 && cs < 4)
+		return 1;
+	return 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	debug("spi_cs_activate: bus=%u cs=%u\n", slave->bus, slave->cs);
+	at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port,
+		cs_to_portbit[slave->bus][slave->cs].bit, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	debug("spi_cs_deactivate: bus=%u cs=%u\n", slave->bus, slave->cs);
+	at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port,
+		cs_to_portbit[slave->bus][slave->cs].bit, 1);
+}
+
diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c
new file mode 100644
index 0000000..b0fe2d6
--- /dev/null
+++ b/board/emk/top9000/top9000.c
@@ -0,0 +1,290 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <net.h>
+#include <netdev.h>
+#include <mmc.h>
+#include <i2c.h>
+#include <spi.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_shdwn.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_NAND
+static void nand_hw_init(void)
+{
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA,
+		csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	at91_sys_write(AT91_SMC_SETUP(3),
+		AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+		AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(3),
+		AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+		AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
+	at91_sys_write(AT91_SMC_CYCLE(3),
+		AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
+	at91_sys_write(AT91_SMC_MODE(3),
+		AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		AT91_SMC_EXNWMODE_DISABLE |
+		AT91_SMC_DBW_8 |
+		AT91_SMC_TDF_(2));
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void macb_hw_init(void)
+{
+	/* Enable EMAC clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+
+	/* Initialize EMAC=MACB hardware */
+	at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+	/* Enable MCI clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
+
+	/* Initialize MCI hardware */
+	at91_mci_hw_init();
+
+	/* This calls the atmel_mmc_init in gen_atmel_mci.c */
+	return atmel_mci_init((void *)AT91_BASE_MCI);
+}
+
+/* this is a weak define that we are overriding */
+int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+{
+	/*
+	 * the only currently existing use of this function
+	 * (fsl_esdhc.c) suggests this function must return
+	 * *cs = TRUE if a card is NOT detected -> in most
+	 * cases the value of the pin when the detect switch
+	 * closes to GND
+	 */
+	*cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
+	return 0;
+}
+
+#endif
+
+int board_early_init_f(void)
+{
+	at91_shdwn_t *shdwn = (at91_shdwn_t *)AT91_SHDWN_BASE;
+
+	/*
+	 * make sure the board can be powered on by
+	 * any transition on WKUP
+	 */
+	writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
+		&shdwn->mr);
+
+	/* Enable clocks for all PIOs */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+
+	/* set SCL0 and SDA0 to open drain */
+	at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
+	at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
+	at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
+
+	/* set SCL1 and SDA1 to open drain */
+	at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
+	at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
+	at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
+	return 0;
+}
+
+int board_init(void)
+{
+	/* arch number of TOP9000 Board */
+	gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	at91_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+	nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	macb_hw_init();
+#endif
+#ifdef CONFIG_ATMEL_SPI0
+	/* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
+	at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
+#endif
+#ifdef CONFIG_ATMEL_SPI1
+	at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
+#endif
+	return 0;
+}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	/* read 'factory' part of EEPROM */
+	read_factory_r();
+	return 0;
+}
+#endif
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+	/*
+	 * Initialize ethernet HW addresses prior to starting Linux,
+	 * needed for nfsroot.
+	 * TODO: We need to investigate if that is really necessary.
+	 */
+	eth_init(gd->bd);
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+	int num = 0;
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0,
+		(void *)AT91_EMAC_BASE,
+		CONFIG_SYS_PHY_ID);
+	if (!rc)
+		num++;
+#endif
+#ifdef CONFIG_ENC28J60
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+# ifdef CONFIG_ENC28J60_2
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+#  ifdef CONFIG_ENC28J60_3
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+#  endif
+# endif
+#endif
+	return num;
+}
+
+/*
+ * I2C access functions
+ *
+ * Note:
+ * We need to access Bus 0 before relocation to access the
+ * environment settings.
+ * However i2c_get_bus_num() cannot be called before
+ * relocation.
+ */
+#ifdef CONFIG_SOFT_I2C
+void iic_init(void)
+{
+	/* ports are now initialized in board_early_init_f() */
+}
+
+int iic_read(void)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
+	case 1:
+		return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
+	}
+	return 1;
+}
+
+void iic_sda(int bit)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
+		break;
+	case 1:
+		at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
+		break;
+	}
+}
+
+void iic_scl(int bit)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
+		break;
+	case 1:
+		at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
+		break;
+	}
+}
+
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2209676..319c812 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -70,6 +70,8 @@ voiceblue                    arm         arm925t
 omap1510inn                  arm         arm925t     -                   ti
 afeb9260                     arm         arm926ejs   -                   -              at91
 at91cap9adk                  arm         arm926ejs   -                   atmel          at91
+top9000eval_xe               arm         arm926ejs   top9000             emk            at91        top9000:EVAL9000
+top9000su_xe                 arm         arm926ejs   top9000             emk            at91        top9000:SU9000
 meesc                        arm         arm926ejs   -                   esd            at91
 otc570                       arm         arm926ejs   -                   esd            at91
 pm9261                       arm         arm926ejs   -                   ronetix        at91
diff --git a/include/configs/top9000.h b/include/configs/top9000.h
new file mode 100644
index 0000000..ff3933b
--- /dev/null
+++ b/include/configs/top9000.h
@@ -0,0 +1,314 @@
+/*
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+ *
+ * Configuation settings for the TOP9000 CPU module with AT91SAM9XE.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * top9000 with at91sam9xe256 or at91sam9xe512
+ *
+ * Initial Bootloader is in embedded flash.
+ * Vital Product Data, U-Boot Environment are in I2C-EEPROM.
+ * U-Boot is in embedded flash, a backup U-Boot can be in NAND flash.
+ * kernel and file system are either in NAND flash or on a micro SD card.
+ * NAND flash is optional.
+ * I2C EEPROM is never optional.
+ * SPI FRAM is optional.
+ * SPI ENC28J60 is optional.
+ * 16 or 32 bit wide SDRAM.
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program
+ */
+#define CONFIG_SYS_TEXT_BASE		0x21f00000	/* 31 MB into RAM */
+
+/* Command line configuration */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+#define CONFIG_CMD_ASKENV
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE \
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_PROMPT		"TOP9000> "
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CACHE
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz xtal */
+#define CONFIG_SYS_HZ			1000
+
+/* SoC */
+#define CONFIG_ARM926EJS		/* ARM926EJS Core */
+#define CONFIG_AT91FAMILY		/* it's a member of AT91 */
+#define CONFIG_AT91SAM9260		/* Atmel AT91SAM9260 based SoC */
+#define CONFIG_AT91SAM9XE
+
+/* Misc CPU related */
+#define CONFIG_AT91_LEGACY
+#define CONFIG_ARCH_CPU_INIT
+#undef	CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_AT91RESET_EXTRST		/* assert external reset */
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART3			/* USART 3 is DBGU !!! */
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+
+/* SD/MMC card */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_SYS_MMC_CD_PIN		AT91_PIN_PC9
+#define CONFIG_CMD_MMC
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_SYS_PHY_ID	1
+#define CONFIG_RMII
+#define CONFIG_NET_MULTI
+#define CONFIG_NET_RETRY_COUNT	20
+
+/* real time clock */
+#define CONFIG_RTC_AT91SAM9_RTT
+#define CONFIG_CMD_DATE
+
+#if defined(CONFIG_AT91SAM9XE)
+/*
+ * NOR flash - use embedded flash of SAM9XE256/512
+ * U-Boot will not fit into 128K !
+ * 2010.09 will not fit into 256K with all options enabled !
+ *
+ * Layout:
+ * 16kB	1st Bootloader
+ * Rest U-Boot
+ * the first sector (16kB) of EFLASH cannot be unprotected
+ * with u-boot commands
+ */
+# define CONFIG_AT91_EFLASH
+# define CONFIG_SYS_FLASH_BASE		0x200000
+# define CONFIG_SYS_MAX_FLASH_SECT	32
+# define CONFIG_SYS_MAX_FLASH_BANKS	1
+# define CONFIG_SYS_FLASH_PROTECTION
+# define CONFIG_EFLASH_PROTSECTORS	1	/* protect first sector */
+#endif
+
+/* SPI */
+#define CONFIG_ATMEL_SPI
+#define CONFIG_CMD_SPI
+
+/* RAMTRON FRAM */
+#define CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI0		/* SPI used for FRAM is SPI0 */
+#define FRAM_SPI_BUS		0
+#define FRAM_CS_NUM		0
+#define CONFIG_SPI_FLASH		/* RAMTRON FRAM on SPI bus */
+#define CONFIG_SPI_FRAM_RAMTRON
+#define CONFIG_SF_DEFAULT_SPEED	1000000	/* be conservative here... */
+#define CONFIG_SF_DEFAULT_MODE	SPI_MODE_0
+#define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC	"FM25H20"
+
+/* Microchip ENC28J60 (second LAN) */
+#if defined(CONFIG_EVAL9000)
+# define CONFIG_ENC28J60
+# define CONFIG_ATMEL_SPI1		/* SPI used for ENC28J60 is SPI1 */
+# define ENC_SPI_BUS		1
+# define ENC_CS_NUM		0
+# define ENC_SPI_CLOCK	1000000
+#endif /* CONFIG_EVAL9000 */
+
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x08000000
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		0x21e00000
+#define CONFIG_SYS_LOAD_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 0x01000000)
+/*
+ * Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(0x00300000 + 0x4000 - GENERATED_GBL_DATA_SIZE)
+
+/*
+ * NAND flash: 256 MB (optional)
+ *
+ * Layout:
+ * 640kB: u-boot (includes space for spare sectors, handled by
+ * initial loader)
+ * 2MB: kernel
+ * rest: file system
+ */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
+#define CONFIG_CMD_NAND
+
+/* USB */
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00500000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"top9000"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* I2C support must always be enabled */
+#define CONFIG_SOFT_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED		400000
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+#define CONFIG_I2C_MULTI_BUS
+#define I2C0_PORT			AT91_PIO_PORTA
+#define SDA0_PIN			23
+#define SCL0_PIN			24
+#define I2C1_PORT			AT91_PIO_PORTB
+#define SDA1_PIN			12
+#define SCL1_PIN			13
+#define I2C_SOFT_DECLARATIONS		void iic_init(void);\
+					int iic_read(void);\
+					void iic_sda(int);\
+					void iic_scl(int);
+#define I2C_ACTIVE
+#define I2C_TRISTATE
+#define I2C_INIT			iic_init()
+#define I2C_READ			iic_read()
+#define I2C_SDA(bit)			iic_sda(bit)
+#define I2C_SCL(bit)			iic_scl(bit)
+#define I2C_DELAY			udelay(3)
+/* EEPROM configuration */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
+#define CONFIG_SYS_EEPROM_SIZE		0x2000
+#define CONFIG_SYS_I2C_EEPROM_ADDR	0x57
+/* later: #define CONFIG_I2C_ENV_EEPROM_BUS	0 */
+/* ENV is always in I2C-EEPROM */
+#define CONFIG_ENV_IS_IN_EEPROM
+#define CONFIG_ENV_OFFSET		0x1000
+#define CONFIG_ENV_SIZE			0x0f00
+/* VPD settings */
+#define CONFIG_SYS_I2C_FACT_ADDR	0x57
+#define CONFIG_SYS_FACT_OFFSET		0x1F00
+#define CONFIG_SYS_FACT_SIZE		0x0100
+/* later: #define CONFIG_MISC_INIT_R */
+/* define the next only if you want to allow users to enter VPD data */
+#define CONFIG_SYS_FACT_ENTRY
+#ifndef __ASSEMBLY__
+extern void read_factory_r(void);
+#endif
+
+/*
+ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
+ * data on the serial line may interrupt the boot sequence.
+ */
+#define CONFIG_BOOTDELAY		1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT \
+	"Press SPACE to abort autoboot in %d seconds\n", bootdelay
+#define CONFIG_AUTOBOOT_DELAY_STR	"d"
+#define CONFIG_AUTOBOOT_STOP_STR	" "
+
+/*
+ * add filesystem commands if we have at least 1 storage
+ * media with filesystem
+ */
+#if defined(CONFIG_NAND_ATMEL) \
+	|| defined(CONFIG_USB_ATMEL) \
+	|| defined(CONFIG_MMC)
+# define CONFIG_DOS_PARTITION
+# define CONFIG_CMD_FAT
+# define CONFIG_CMD_EXT2
+/* later: #define CONFIG_CMD_JFFS2 */
+#endif
+
+/* add NET commands if we have at least 1 LAN */
+#if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60)
+# define CONFIG_CMD_PING
+# define CONFIG_CMD_DHCP
+# define CONFIG_CMD_MII
+/* is this really needed ? */
+# define CONFIG_RESET_PHY_R
+/* BOOTP options */
+# define CONFIG_BOOTP_BOOTFILESIZE
+# define CONFIG_BOOTP_BOOTPATH
+# define CONFIG_BOOTP_GATEWAY
+# define CONFIG_BOOTP_HOSTNAME
+#endif
+
+/* linux in NAND flash */
+#define CONFIG_BOOTCOUNT_LIMIT	1
+#define CONFIG_BOOTCOMMAND \
+	"nand read 0x21000000 0xA0000 0x200000; bootm"
+#define CONFIG_BOOTARGS \
+	"console=ttyS0,115200 " \
+	"root=/dev/mtdblock2 " \
+	"mtdparts=atmel_nand:" \
+		"640k(uboot)ro," \
+		"2M(linux)," \
+		"16M(root)," \
+		"-(rest) " \
+	"rw "\
+	"rootfstype=jffs2"
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN \
+	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_STACKSIZE		(32*1024)
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif
+