summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2014-10-20 19:48:32 -0600
committerSimon Glass <sjg@chromium.org>2014-10-22 10:35:57 -0600
commitc6b0b090329958d7c1bd1285a720490945258b94 (patch)
treea372fe41a245f409edb23a3bcd7cf2ea83817467
parent41678484b3c6c34a1a73dae2561cc7070662cf5f (diff)
downloadu-boot-imx-c6b0b090329958d7c1bd1285a720490945258b94.zip
u-boot-imx-c6b0b090329958d7c1bd1285a720490945258b94.tar.gz
u-boot-imx-c6b0b090329958d7c1bd1285a720490945258b94.tar.bz2
dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the hardware. It is possible in most cases to determine the register address of each, but not in all cases. By adding an additional property we can fix this, and avoid adding a table to U-Boot for every single Exynos SOC. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/dts/exynos4210-pinctrl-uboot.dtsi27
-rw-r--r--arch/arm/dts/exynos4210.dtsi1
-rw-r--r--arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi46
-rw-r--r--arch/arm/dts/exynos4x12.dtsi1
-rw-r--r--arch/arm/dts/exynos5250-pinctrl-uboot.dtsi40
-rw-r--r--arch/arm/dts/exynos5250.dtsi1
-rw-r--r--arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi40
-rw-r--r--arch/arm/dts/exynos54xx-pinctrl.dtsi2
-rw-r--r--arch/arm/dts/exynos54xx.dtsi1
9 files changed, 159 insertions, 0 deletions
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..ee071c1
--- /dev/null
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -0,0 +1,27 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos4210-pinctrl";
+ };
+
+ pinctrl_1: pinctrl@11000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpy0: gpy0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4210.dtsi b/arch/arm/dts/exynos4210.dtsi
index 48ecd7a..634a5c1 100644
--- a/arch/arm/dts/exynos4210.dtsi
+++ b/arch/arm/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
#include "exynos4.dtsi"
#include "exynos4210-pinctrl.dtsi"
+#include "exynos4210-pinctrl-uboot.dtsi"
/ {
compatible = "samsung,exynos4210";
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..c02796d
--- /dev/null
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpf0: gpf0 {
+ reg = <0xc180>;
+ };
+ gpj0: gpj0 {
+ reg = <0x240>;
+ };
+ };
+
+ pinctrl_1: pinctrl@11000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpk0: gpk0 {
+ reg = <0x40>;
+ };
+ gpm0: gpm0 {
+ reg = <0x260>;
+ };
+ gpy0: gpy0 {
+ reg = <0x120>;
+ };
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl_3: pinctrl@106E0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4x12.dtsi b/arch/arm/dts/exynos4x12.dtsi
index 5bc8f31..5d58c6e 100644
--- a/arch/arm/dts/exynos4x12.dtsi
+++ b/arch/arm/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
#include "exynos4.dtsi"
#include "exynos4x12-pinctrl.dtsi"
+#include "exynos4x12-pinctrl-uboot.dtsi"
/ {
aliases {
diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..7edb0ca
--- /dev/null
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpc4: gpc4 {
+ reg = <0x2e0>;
+ };
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_1: pinctrl@13400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl_2: pinctrl@10d10000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpv2: gpv2 {
+ reg = <0x060>;
+ };
+ gpv4: gpv4 {
+ reg = <0xc0>;
+ };
+ };
+
+ pinctrl_3: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 16581dd..ccbafe9 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -7,6 +7,7 @@
#include "exynos5.dtsi"
#include "exynos5250-pinctrl.dtsi"
+#include "exynos5250-pinctrl-uboot.dtsi"
/ {
aliases {
diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..5a86211
--- /dev/null
+++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ /*
+ * Replicate the ordering of arch/arm/include/asm/arch-exynos/gpio.h
+ * TODO(sjg@chromium.org): This ordering ceases to matter once GPIO
+ * numbers are not needed in U-Boot for exynos.
+ */
+ pinctrl@14010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ pinctrl@13400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpy7 {
+ };
+
+ gpx0 {
+ reg = <0xc00>;
+ };
+ };
+ pinctrl@13410000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ pinctrl@14000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos54xx-pinctrl.dtsi b/arch/arm/dts/exynos54xx-pinctrl.dtsi
index b3e63d1..775d956 100644
--- a/arch/arm/dts/exynos54xx-pinctrl.dtsi
+++ b/arch/arm/dts/exynos54xx-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos54xx-pinctrl-uboot.dtsi"
+
/ {
pinctrl@13400000 {
gpy7: gpy7 {
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index 887b034..916cf3a 100644
--- a/arch/arm/dts/exynos54xx.dtsi
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -6,6 +6,7 @@
*/
#include "exynos5.dtsi"
+#include "exynos54xx-pinctrl.dtsi"
/ {
config {