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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-04-21 10:47:41 +0530
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:53 -0700
commitb33bd8cd4b7627f64698c6f26739e0c4597bdfbc (patch)
treec3b20d61b95cc3fee227f88479d0b620514ba4be
parentef531c73570794b7676b62de4224bd294919b83b (diff)
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powerpc/mpc85xx:Update FM1 clock select and shift for B4420
B4420 is a personality of B4860. It should have same FM1_CLK_SEK and FM1_CLK_SHIFT as B4860 Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/speed.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 2d6c668..d516d4e 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -163,8 +163,8 @@ void get_sys_info(sys_info_t *sys_info)
sys_info->freq_processor[cpu] =
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
-#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_T2080) || \
- defined(CONFIG_PPC_T2081)
+#if defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420) || \
+ defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
#define FM1_CLK_SEL 0xe0000000
#define FM1_CLK_SHIFT 29
#else