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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-01-25 12:53:32 +0530
committerYork Sun <yorksun@freescale.com>2014-02-03 08:38:48 -0800
commitaceea941b65130459eae1e6faec14768d1ce9d24 (patch)
treef16a7fb6ff3bf55aeb4ece30ebdae5e7c58f96c5
parent4393fd40adcf9533a42f8380f8e822fe16c833da (diff)
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driver/fsl_pci:Update print to display PCIe generation
Current print only display width of PCIe device. Add print to display PCIe generation supported by the device. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r--drivers/pci/fsl_pci_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 2085cd6..6317fb1 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -510,8 +510,8 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
/* Print the negotiated PCIe link width */
pci_hose_read_config_word(hose, dev, pci_lsr, &temp16);
- printf("x%d, regs @ 0x%lx\n", (temp16 & 0x3f0 ) >> 4,
- pci_info->regs);
+ printf("x%d gen%d, regs @ 0x%lx\n", (temp16 & 0x3f0) >> 4,
+ (temp16 & 0xf), pci_info->regs);
hose->current_busno++; /* Start scan with secondary */
pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);