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authorRobin Gong <b38343@freescale.com>2014-12-17 20:56:02 +0800
committerRobin Gong <b38343@freescale.com>2014-12-18 20:23:19 +0800
commit99b0b68a1ddf248e9766b194821da97045f04a4f (patch)
tree99498cc67d60ce553252fbd2587c5037b24a1cad
parentbf7ffcfd6698144419be4f35bd1e567f6c4c71d2 (diff)
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MLK-9891-1: ARM: imx6: split WDOG_B setting from set_anatop_bypass() function
We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to reboot whole board, so split these code to independent function so that board file can call it freely. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 93d457e4c601ee5266bc30b7dfa5fa1bbfa8500a)
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c35
-rw-r--r--arch/arm/include/asm/arch-mx6/sys_proto.h1
2 files changed, 21 insertions, 15 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 01776a6..3c3d2fd 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -923,22 +923,9 @@ void prep_anatop_bypass(void)
#endif
}
-int set_anatop_bypass(int wdog_reset_pin)
+void set_wdog_reset(struct wdog_regs *wdog)
{
- struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct wdog_regs *wdog;
- u32 reg = readl(&ccm_regs->reg_core);
-
- /* bypass VDDARM/VDDSOC */
- reg = reg | (0x1F << 18) | 0x1F;
- writel(reg, &ccm_regs->reg_core);
-
- if (wdog_reset_pin == 2)
- wdog = (struct wdog_regs *) WDOG2_BASE_ADDR;
- else if (wdog_reset_pin == 1)
- wdog = (struct wdog_regs *) WDOG1_BASE_ADDR;
- else
- return arm_orig_podf;
+ u32 reg = readw(&wdog->wcr);
/*
* use WDOG_B mode to reset external pmic because it's risky for the
* following watchdog reboot in case of cpu freq at lowest 400Mhz with
@@ -956,7 +943,25 @@ int set_anatop_bypass(int wdog_reset_pin)
*/
reg |= 1 << 0;
writew(reg, &wdog->wcr);
+}
+int set_anatop_bypass(int wdog_reset_pin)
+{
+ struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct wdog_regs *wdog;
+ u32 reg = readl(&ccm_regs->reg_core);
+
+ /* bypass VDDARM/VDDSOC */
+ reg = reg | (0x1F << 18) | 0x1F;
+ writel(reg, &ccm_regs->reg_core);
+
+ if (wdog_reset_pin == 2)
+ wdog = (struct wdog_regs *) WDOG2_BASE_ADDR;
+ else if (wdog_reset_pin == 1)
+ wdog = (struct wdog_regs *) WDOG1_BASE_ADDR;
+ else
+ return arm_orig_podf;
+ set_wdog_reset(wdog);
return arm_orig_podf;
}
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 5b42ce9..cc309cd 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -22,6 +22,7 @@ u32 get_cpu_rev(void);
const char *get_imx_type(u32 imxtype);
unsigned imx_ddr_size(void);
+void set_wdog_reset(struct wdog_regs *wdog);
#ifdef CONFIG_LDO_BYPASS_CHECK
int check_ldo_bypass(void);