summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTimur Tabi <timur@freescale.com>2008-07-18 16:52:23 +0200
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-09-08 17:46:48 -0500
commit8febd13c69cb68652577d1a9fcbde954bf784155 (patch)
treef4ba0920b6a4f7e5144d7e4a898e21cbb8c4449e
parent302e52e0b1d4c7f994991709d0cb6c3ea612cdb5 (diff)
downloadu-boot-imx-8febd13c69cb68652577d1a9fcbde954bf784155.zip
u-boot-imx-8febd13c69cb68652577d1a9fcbde954bf784155.tar.gz
u-boot-imx-8febd13c69cb68652577d1a9fcbde954bf784155.tar.bz2
Update Freescale 85xx boards to sys_eeprom.c
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale 86xx boards already use sys_eeprom.c, so this patch migrates the remaining Freescale 85xx boards to use it as well. cds_eeprom.c is deleted. Signed-off-by: Timur Tabi <timur@freescale.com>
-rw-r--r--board/freescale/common/Makefile1
-rw-r--r--board/freescale/common/cds_eeprom.c60
-rw-r--r--include/configs/MPC8541CDS.h9
-rw-r--r--include/configs/MPC8548CDS.h9
-rw-r--r--include/configs/MPC8555CDS.h10
5 files changed, 22 insertions, 67 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 8584374..02a824d 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -30,7 +30,6 @@ endif
LIB = $(obj)lib$(VENDOR).a
COBJS-${CONFIG_FSL_CADMUS} += cadmus.o
-COBJS-${CONFIG_FSL_CDS_EEPROM} += cds_eeprom.o
COBJS-${CONFIG_FSL_VIA} += cds_via.o
COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o
COBJS-${CONFIG_FSL_PIXIS} += pixis.o
diff --git a/board/freescale/common/cds_eeprom.c b/board/freescale/common/cds_eeprom.c
deleted file mode 100644
index 5034e0c..0000000
--- a/board/freescale/common/cds_eeprom.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <common.h>
-#include <i2c.h>
-
-#include "eeprom.h"
-
-
-typedef struct {
- char idee_pcbid[4]; /* "CCID" for CDC v1.X */
- u8 idee_major;
- u8 idee_minor;
- char idee_serial[10];
- char idee_errata[2];
- char idee_date[8]; /* yyyymmdd */
- /* The rest of the EEPROM space is reserved */
-} id_eeprom_t;
-
-
-unsigned int
-get_cpu_board_revision(void)
-{
- uint major = 0;
- uint minor = 0;
-
- id_eeprom_t id_eeprom;
-
- i2c_read(CFG_I2C_EEPROM_ADDR, 0, 2,
- (uchar *) &id_eeprom, sizeof(id_eeprom));
-
- major = id_eeprom.idee_major;
- minor = id_eeprom.idee_minor;
-
- if (major == 0xff && minor == 0xff) {
- major = minor = 0;
- }
-
- return MPC85XX_CPU_BOARD_REV(major,minor);
-}
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 29dff32..bfd86f5 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -44,7 +44,6 @@
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_FSL_VIA
-#define CONFIG_FSL_CDS_EEPROM
/*
* When initializing flash, if we cannot find the manufacturer ID,
@@ -328,11 +327,17 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_CCID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index ec0b4ff..06965ed 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -50,7 +50,6 @@
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_FSL_VIA
-#define CONFIG_FSL_CDS_EEPROM
/*
* When initializing flash, if we cannot find the manufacturer ID,
@@ -352,11 +351,17 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_CCID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index c07a725..a92c0fe 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -43,7 +43,7 @@
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_FSL_VIA
-#define CONFIG_FSL_CDS_EEPROM
+
/*
* When initializing flash, if we cannot find the manufacturer ID,
@@ -325,11 +325,17 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_CCID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+
/*
* General PCI
* Addresses are mapped 1-1.