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authorRicardo Salveti de Araujo <ricardo.salveti@linaro.org>2011-09-21 10:17:30 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:33 +0200
commit8f6a027f627d6002bedc3ab12610535dbf9ef497 (patch)
tree6e51cfcf72c8058aac96ed0536863c04425e4313
parent20033c9f87ef6aa9834aeab19bc363abc3d92a4d (diff)
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omap4: adding revision detection for 4460 ES1.1
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> 2 files changed, 17 insertions(+), 1 deletions(-) Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap4/board.c12
-rw-r--r--arch/arm/include/asm/arch-omap4/omap4.h6
2 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 86ddef2..6d8811f 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -218,7 +218,17 @@ static void init_omap4_revision(void)
*omap4_revision = OMAP4430_ES2_3;
break;
case MIDR_CORTEX_A9_R2P10:
- *omap4_revision = OMAP4460_ES1_0;
+ switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4460_CONTROL_ID_CODE_ES1_0:
+ *omap4_revision = OMAP4460_ES1_0;
+ break;
+ case OMAP4460_CONTROL_ID_CODE_ES1_1:
+ *omap4_revision = OMAP4460_ES1_1;
+ break;
+ default:
+ *omap4_revision = OMAP4460_ES1_0;
+ break;
+ }
break;
default:
*omap4_revision = OMAP4430_SILICON_ID_INVALID;
diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h
index 38f4eb1..61ebb3d 100644
--- a/arch/arm/include/asm/arch-omap4/omap4.h
+++ b/arch/arm/include/asm/arch-omap4/omap4.h
@@ -57,12 +57,17 @@
/* CONTROL_ID_CODE */
#define CONTROL_ID_CODE 0x4A002204
+/* 4430 */
#define OMAP4430_CONTROL_ID_CODE_ES1_0 0x0B85202F
#define OMAP4430_CONTROL_ID_CODE_ES2_0 0x1B85202F
#define OMAP4430_CONTROL_ID_CODE_ES2_1 0x3B95C02F
#define OMAP4430_CONTROL_ID_CODE_ES2_2 0x4B95C02F
#define OMAP4430_CONTROL_ID_CODE_ES2_3 0x6B95C02F
+/* 4460 */
+#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
+#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
+
/* UART */
#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000)
#define UART2_BASE (OMAP44XX_L4_PER_BASE + 0x6c000)
@@ -191,6 +196,7 @@ struct control_lpddr2io_regs {
#define OMAP4430_ES2_2 0x44300220
#define OMAP4430_ES2_3 0x44300230
#define OMAP4460_ES1_0 0x44600100
+#define OMAP4460_ES1_1 0x44600110
/* ROM code defines */
/* Boot device */