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| author | Stephen Warren <swarren@nvidia.com> | 2016-09-23 17:43:49 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-09-27 09:11:03 -0700 |
| commit | 8e5d804f890b32959cc9d9f9349ccd2ff4a744a0 (patch) | |
| tree | 4850a6706262d21496028068ea204eed391b3353 | |
| parent | 6dca554f238d23d2c67873d850b7576e5971c5fd (diff) | |
| download | u-boot-imx-8e5d804f890b32959cc9d9f9349ccd2ff4a744a0.zip u-boot-imx-8e5d804f890b32959cc9d9f9349ccd2ff4a744a0.tar.gz u-boot-imx-8e5d804f890b32959cc9d9f9349ccd2ff4a744a0.tar.bz2 | |
ARM: tegra: flush caches via SMC call
On Tegra186, it is necessary to perform an SMC to fully flush all caches;
flushing/cleaning by set/way is not enough. Implement the required hook
to make this happen.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/tegra186/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra186/cache.c | 23 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile index 033d600..7f46a05 100644 --- a/arch/arm/mach-tegra/tegra186/Makefile +++ b/arch/arm/mach-tegra/tegra186/Makefile @@ -3,5 +3,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += ../board186.o +obj-y += cache.o obj-y += nvtboot_ll.o obj-y += nvtboot_mem.o diff --git a/arch/arm/mach-tegra/tegra186/cache.c b/arch/arm/mach-tegra/tegra186/cache.c new file mode 100644 index 0000000..adaed89 --- /dev/null +++ b/arch/arm/mach-tegra/tegra186/cache.c @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <asm/system.h> + +#define SMC_SIP_INVOKE_MCE 0x82FFFF00 +#define MCE_SMC_ROC_FLUSH_CACHE 11 + +int __asm_flush_l3_cache(void) +{ + struct pt_regs regs = {0}; + + isb(); + + regs.regs[0] = SMC_SIP_INVOKE_MCE | MCE_SMC_ROC_FLUSH_CACHE; + smc_call(®s); + + return 0; +} |