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author | Stephen Warren <swarren@nvidia.com> | 2016-04-15 14:40:37 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-04-18 17:11:51 -0400 |
commit | 724219a65f55894413c098be06263960c399c323 (patch) | |
tree | 99b5ada16af20b43d5945a4a5062b571737ffa08 | |
parent | e1acaa67679ebdb9caf4f1bf9a6f3ec8ebebf91b (diff) | |
download | u-boot-imx-724219a65f55894413c098be06263960c399c323.zip u-boot-imx-724219a65f55894413c098be06263960c399c323.tar.gz u-boot-imx-724219a65f55894413c098be06263960c399c323.tar.bz2 |
ARM: always perform per-CPU GIC init
The current code in ARMv8's lowlevel_init() skips the per-CPU GIC
initialization ifndef CONFIG_ARMV8_MULTIENTRY. However, the per-CPU init
should always occur; it's just the one-time init that should only happen
on the master.
Once this consideration is taken into account, the only difference between
the paths when CONFIG_ARMV8_MULTIENTRY is undefined/defined is the use of
branch_if_slave. Naively, any unified code would need to invoke this
conditionally upon ifdef CONFIG_ARMV8_MULTIENTRY. However, branch_if_slave
already checks CONFIG_ARMV8_MULTIENTRY and does nothing if it isn't
defined, so we don't even need that ifdef at the call site.
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r-- | arch/arm/cpu/armv8/start.S | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index dceedd7..deb44a8 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -201,15 +201,6 @@ ENDPROC(apply_core_errata) WEAK(lowlevel_init) mov x29, lr /* Save LR */ -#ifndef CONFIG_ARMV8_MULTIENTRY -#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) - /* - * For single-entry systems the lowlevel init is very simple. - */ - ldr x0, =GICD_BASE - bl gic_init_secure -#endif -#else /* CONFIG_ARMV8_MULTIENTRY is set */ #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) branch_if_slave x0, 1f ldr x0, =GICD_BASE @@ -223,7 +214,6 @@ WEAK(lowlevel_init) ldr x1, =GICC_BASE bl gic_init_secure_percpu #endif -#endif branch_if_master x0, x1, 2f |