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authorSimon Glass <sjg@chromium.org>2014-11-14 18:18:39 -0700
committerSimon Glass <sjg@chromium.org>2014-11-25 06:34:01 -0700
commit4896f4acc8b67155026cd1095b5dcdb22e70445a (patch)
tree62fc824417a0c17df8ce58e9446dd2b5e3c4e956
parent3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0 (diff)
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x86: dts: Add SATA settings for link
Add the requires settings to enable SATA on link. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/dts/link.dts7
-rw-r--r--include/configs/chromebook_link.h1
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index 28cef07..d3c94e0 100644
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -164,6 +164,13 @@
};
pci {
+ sata {
+ compatible = "intel,pantherpoint-ahci";
+ intel,sata-mode = "ahci";
+ intel,sata-port-map = <1>;
+ intel,sata-port0-gen3-tx = <0x00880a7f>;
+ };
+
lpc {
compatible = "intel,lpc";
#address-cells = <1>;
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 055b3ac..e9efd7c 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -52,7 +52,6 @@
#undef CONFIG_CMD_SF
#undef CONFIG_USB_EHCI
#undef CONFIG_CMD_USB
-#undef CONFIG_CMD_SCSI
#define CONFIG_PCI_MEM_BUS 0xe0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS