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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-08-31 18:24:24 +0200
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-09-01 14:21:34 +0200
commit36d375faf5cff98e8dca32aabbbb1ec6036437dd (patch)
treeba828554f9f7775e5970da69c298f599bf300fc7
parentabdde2b1d570b1ee77606bf783444fcddf7f0965 (diff)
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avr32: Use board_postclk_init instead of gclk_init
Replace the avr32-specific gclk_init() board hook with the standard board_postclk_init() hook which is supposed to run at the same point during initialization. Provide a dummy weak alias for boards not implementing this hook. The cost of this is: - 2 bytes for the dummy function (retal 0) - 2 bytes for each unnecessary function call (short rcall) which is a pretty small price to pay for avoiding lots of #ifdef clutter. In this particular case, all boards probably end up slightly smaller because we avoid the conditional checking if the gclk_init symbol is NULL. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
-rw-r--r--board/miromico/hammerhead/hammerhead.c3
-rw-r--r--cpu/at32ap/cpu.c3
-rw-r--r--include/asm-avr32/arch-at32ap700x/clk.h1
-rw-r--r--lib_avr32/board.c8
4 files changed, 10 insertions, 5 deletions
diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
index bf432cb..8670527 100644
--- a/board/miromico/hammerhead/hammerhead.c
+++ b/board/miromico/hammerhead/hammerhead.c
@@ -100,9 +100,10 @@ void board_init_info(void)
gd->bd->bi_phy_id[0] = 0x01;
}
-void gclk_init(void)
+int board_postclk_init(void)
{
/* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
gclk_enable_output(3, PORTMUX_DRIVE_LOW);
gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000);
+ return 0;
}
diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 1a13702..0ba8361 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -65,9 +65,6 @@ int cpu_init(void)
sysreg_write(EVBA, (unsigned long)&_evba);
asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET));
- if(gclk_init)
- gclk_init();
-
return 0;
}
diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h
index b2710a4..21545a3 100644
--- a/include/asm-avr32/arch-at32ap700x/clk.h
+++ b/include/asm-avr32/arch-at32ap700x/clk.h
@@ -84,7 +84,6 @@ static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
#endif
extern void clk_init(void);
-extern void gclk_init(void) __attribute__((weak));
/* Board code may need the SDRAM base clock as a compile-time constant */
#define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
diff --git a/lib_avr32/board.c b/lib_avr32/board.c
index d6423d4..19d76d2 100644
--- a/lib_avr32/board.c
+++ b/lib_avr32/board.c
@@ -47,6 +47,13 @@ static unsigned long mem_malloc_start = 0;
static unsigned long mem_malloc_end = 0;
static unsigned long mem_malloc_brk = 0;
+/* Weak aliases for optional board functions */
+static int __do_nothing(void)
+{
+ return 0;
+}
+int board_postclk_init(void) __attribute__((weak, alias("__do_nothing")));
+
/* The malloc area is right below the monitor image in RAM */
static void mem_malloc_init(void)
{
@@ -187,6 +194,7 @@ void board_init_f(ulong board_type)
/* Perform initialization sequence */
board_early_init_f();
cpu_init();
+ board_postclk_init();
env_init();
init_baudrate();
serial_init();