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authorAlbert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr>2016-09-26 09:08:05 +0200
committerStefano Babic <sbabic@denx.de>2016-10-06 09:06:16 +0200
commit303a24435f3e4b39a6b526ca2a32cd0452713153 (patch)
tree33d2d44a1f577492e949241d6b6414757380348f
parent083e4fd401f5a29343c28333a5b83693b44bea5a (diff)
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pcm052: add 'm4go' command
Add the 'm4go' command to pcm052-based targets. It loads scatter file images. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
-rw-r--r--board/phytec/pcm052/pcm052.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c
index e4f61e1..7341899 100644
--- a/board/phytec/pcm052/pcm052.c
+++ b/board/phytec/pcm052/pcm052.c
@@ -513,3 +513,41 @@ int checkboard(void)
return 0;
}
+
+static int do_m4go(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ ulong addr;
+
+ /* Consume 'm4go' */
+ argc--; argv++;
+
+ /*
+ * Parse provided address - default to load_addr in case not provided.
+ */
+
+ if (argc)
+ addr = simple_strtoul(argv[0], NULL, 16);
+ else
+ addr = load_addr;
+
+ /*
+ * Write boot address in PERSISTENT_ENTRY1[31:0] aka SRC_GPR2[31:0]
+ */
+ writel(addr + 0x401, 0x4006E028);
+
+ /*
+ * Start secondary processor by enabling its clock
+ */
+ writel(0x15a5a, 0x4006B08C);
+
+ return 1;
+}
+
+U_BOOT_CMD(
+ m4go, 2 /* one arg max */, 1 /* repeatable */, do_m4go,
+ "start the secondary Cortex-M4 from scatter file image",
+ "[<addr>]\n"
+ " - start secondary Cortex-M4 core using a scatter file image\n"
+ "The argument needs to be a scatter file\n"
+);