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authorMarek Vasut <marex@denx.de>2015-07-12 21:10:24 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:11 +0200
commit2c0d2d9c4026296e8beac3ab88146449a28b3a88 (patch)
tree64afc912c89bee7ae392eeeb1c69277ebbf2cc35
parent2ca151f86c38443ce7b71039b5aab753bfc73fec (diff)
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ddr: altera: Clean up reg_file_set*()
Turn the insides of these functions into trivial clrsetbits_le32() and fix the data type of their argument to reflect it's actual size. Signed-off-by: Marek Vasut <marex@denx.de>
-rw-r--r--drivers/ddr/altera/sequencer.c43
1 files changed, 7 insertions, 36 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index 8273bde..7aae4cc 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -99,49 +99,20 @@ static void set_failing_group_stage(uint32_t group, uint32_t stage,
}
}
-static void reg_file_set_group(uint32_t set_group)
+static void reg_file_set_group(u16 set_group)
{
- /* Read the current group and stage */
- uint32_t cur_stage_group = readl(&sdr_reg_file->cur_stage);
-
- /* Clear the group */
- cur_stage_group &= 0x0000FFFF;
-
- /* Set the group */
- cur_stage_group |= (set_group << 16);
-
- /* Write the data back */
- writel(cur_stage_group, &sdr_reg_file->cur_stage);
+ clrsetbits_le32(&sdr_reg_file->cur_stage, 0xffff0000, set_group << 16);
}
-static void reg_file_set_stage(uint32_t set_stage)
+static void reg_file_set_stage(u8 set_stage)
{
- /* Read the current group and stage */
- uint32_t cur_stage_group = readl(&sdr_reg_file->cur_stage);
-
- /* Clear the stage and substage */
- cur_stage_group &= 0xFFFF0000;
-
- /* Set the stage */
- cur_stage_group |= (set_stage & 0x000000FF);
-
- /* Write the data back */
- writel(cur_stage_group, &sdr_reg_file->cur_stage);
+ clrsetbits_le32(&sdr_reg_file->cur_stage, 0xffff, set_stage & 0xff);
}
-static void reg_file_set_sub_stage(uint32_t set_sub_stage)
+static void reg_file_set_sub_stage(u8 set_sub_stage)
{
- /* Read the current group and stage */
- uint32_t cur_stage_group = readl(&sdr_reg_file->cur_stage);
-
- /* Clear the substage */
- cur_stage_group &= 0xFFFF00FF;
-
- /* Set the sub stage */
- cur_stage_group |= ((set_sub_stage << 8) & 0x0000FF00);
-
- /* Write the data back */
- writel(cur_stage_group, &sdr_reg_file->cur_stage);
+ set_sub_stage &= 0xff;
+ clrsetbits_le32(&sdr_reg_file->cur_stage, 0xff00, set_sub_stage << 8);
}
static void initialize(void)