diff options
| author | Jason Liu <r64343@freescale.com> | 2012-02-09 21:48:01 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-02-09 21:48:01 +0800 |
| commit | 29be0c253854e48547a45ee4b7ad0413e2a58524 (patch) | |
| tree | 94e89c163fbe4d222f44a23cb5dd7d1d08bc195b | |
| parent | 1a509004af6e2dd17237c6e76869408bdbaf197b (diff) | |
| download | u-boot-imx-29be0c253854e48547a45ee4b7ad0413e2a58524.zip u-boot-imx-29be0c253854e48547a45ee4b7ad0413e2a58524.tar.gz u-boot-imx-29be0c253854e48547a45ee4b7ad0413e2a58524.tar.bz2 | |
ENGR00174155: i.mx6sdl: add 32bit DDR support on ARM2 board
The 32bit DDR script got from the following link:
http://compass.freescale.net/livelink/livelink/225194568/
MX6DL_init_DDR3_400MHZ_32bit_1.0.inc.txt?func=doc.Fetch&nodeid=225194568
The DDR hw connection on the ARM2 board is 64bit wire, but we can make it use
as 32bit, the side effect is that DDR access size will reduce to the half
Signed-off-by: Jason Liu <r64343@freescale.com>
| -rw-r--r-- | board/freescale/mx6q_arm2/flash_header.S | 5 | ||||
| -rw-r--r-- | include/configs/mx6dl_arm2.h | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/board/freescale/mx6q_arm2/flash_header.S b/board/freescale/mx6q_arm2/flash_header.S index cfbaae9..8254179 100644 --- a/board/freescale/mx6q_arm2/flash_header.S +++ b/board/freescale/mx6q_arm2/flash_header.S @@ -154,8 +154,13 @@ MXC_DCD_ITEM(70, MMDC_P0_BASE_ADDR + 0x018, 0x00081740) MXC_DCD_ITEM(71, MMDC_P0_BASE_ADDR + 0x01c, 0x00008000) MXC_DCD_ITEM(72, MMDC_P0_BASE_ADDR + 0x02c, 0x000026d2) MXC_DCD_ITEM(73, MMDC_P0_BASE_ADDR + 0x030, 0x00440e21) +#ifdef CONFIG_DDR_32BIT +MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x040, 0x00000017) +MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x000, 0xc3190000) +#else MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x040, 0x00000027) MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x000, 0xc31a0000) +#endif # Initialize 2GB DDR3 - Micron MT41J128M # MR2 diff --git a/include/configs/mx6dl_arm2.h b/include/configs/mx6dl_arm2.h index 8b52ad5..22cfe66 100644 --- a/include/configs/mx6dl_arm2.h +++ b/include/configs/mx6dl_arm2.h @@ -29,6 +29,7 @@ #define CONFIG_MXC #define CONFIG_MX6DL #define CONFIG_MX6Q_ARM2 +#define CONFIG_DDR_32BIT /* For 32bit DDR, comment it out for 64bit */ #define CONFIG_FLASH_HEADER #define CONFIG_FLASH_HEADER_OFFSET 0x400 #define CONFIG_MX6_CLK32 32768 @@ -265,7 +266,11 @@ */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_DDR_BASE_ADDR +#ifdef CONFIG_DDR_32BIT +#define PHYS_SDRAM_1_SIZE (1u * 1024 * 1024 * 1024) +#else #define PHYS_SDRAM_1_SIZE (2u * 1024 * 1024 * 1024) +#endif #define iomem_valid_addr(addr, size) \ (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) |