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authorMarek Vasut <marex@denx.de>2014-09-15 01:18:15 +0200
committerMarek Vasut <marex@denx.de>2014-10-06 17:34:40 +0200
commit1bf29b3d5571bed2b61581e839599337968deb80 (patch)
tree201006e883aec036e088fe1292f1441b57c11660
parentf33c9305830d5f8b996a2aaea66591dc93143fe5 (diff)
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mmc: dw_mmc: Fix cache alignment issue
The DMA descriptors used by the DW MMC block must be aligned to cacheline size, otherwise we are unable to properly flush/inval cache over them and we get data corruption. The reason I chose this approach of expanding the structure is because the driver allocates the descriptors in bulk. This approach does waste space by inserting slop inbetween the descriptors, but it makes access to the descriptors easy as the compiler does know the real size of the structure. It also makes cache operations easy, since the size of the structure is cache aligned and the structure start address is as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Pavel Machek <pavel@denx.de>
-rw-r--r--include/dwmmc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dwmmc.h b/include/dwmmc.h
index b67f11b..109f7c8 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -157,7 +157,7 @@ struct dwmci_idmac {
u32 cnt;
u32 addr;
u32 next_addr;
-};
+} __aligned(ARCH_DMA_MINALIGN);
static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val)
{