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authors-paulraj@ti.com <s-paulraj@ti.com>2009-05-15 23:48:36 +0200
committerWolfgang Denk <wd@denx.de>2009-06-12 20:39:50 +0200
commit1a09d05abfc6d4d4f1fce9f6bd0275bd1c08d4f5 (patch)
treec2faf550c0c01ccae2fdf97d9671e3ef6fee94ea
parentde193e8e369f5f029ed3b6e2fc60341098eea766 (diff)
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ARM DaVinci: Minor Updates to base addresses
Patch adds base addresses for DaVinci DM365. Updated patches for DM365 will be posted soon. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
-rw-r--r--include/asm-arm/arch-davinci/hardware.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h
index 99324e4..313b3f3 100644
--- a/include/asm-arm/arch-davinci/hardware.h
+++ b/include/asm-arm/arch-davinci/hardware.h
@@ -75,6 +75,7 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
+#define DAVINCI_DDR_BASE (0x80000000)
#ifdef CONFIG_SOC_DM644X
#define DAVINCI_UART2_BASE 0x01c20800
@@ -99,6 +100,11 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e10000
#define DAVINCI_MMC_SD0_BASE 0x01e11000
+#elif defined(CONFIG_SOC_DM365)
+#define DAVINCI_MMC_SD1_BASE 0x01d00000
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
+#define DAVINCI_MMC_SD0_BASE 0x01d11000
+
#endif
/* Power and Sleep Controller (PSC) Domains */