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authorEric Nelson <eric.nelson@boundarydevices.com>2015-02-15 14:37:21 -0700
committerStefano Babic <sbabic@denx.de>2015-02-17 10:42:54 +0100
commit11c2e505c4505a8c709cfa65675ba07aedec4e76 (patch)
tree96140dfe00cc75a7628e82742795bf24e9a7abe4
parentfb2589b3307bcbb1c763b2039a50b5e8198af048 (diff)
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ARM: i.MX: provide access to reset cause through get_imx_reset_cause()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
-rw-r--r--arch/arm/imx-common/cpu.c10
-rw-r--r--arch/arm/include/asm/arch-imx/cpu.h2
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 28ccd29..067d08f 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -24,13 +24,16 @@
#include <fsl_esdhc.h>
#endif
-char *get_reset_cause(void)
+static u32 reset_cause = -1;
+
+static char *get_reset_cause(void)
{
u32 cause;
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
cause = readl(&src_regs->srsr);
writel(cause, &src_regs->srsr);
+ reset_cause = cause;
switch (cause) {
case 0x00001:
@@ -53,6 +56,11 @@ char *get_reset_cause(void)
}
}
+u32 get_imx_reset_cause(void)
+{
+ return reset_cause;
+}
+
#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
#if defined(CONFIG_MX53)
#define MEMCTL_BASE ESDCTL_BASE_ADDR
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 254136e..4715f4e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -17,3 +17,5 @@
#define CS0_64M_CS1_64M 1
#define CS0_64M_CS1_32M_CS2_32M 2
#define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3
+
+u32 get_imx_reset_cause(void);