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| author | Ramneek Mehresh <ramneek.mehresh@freescale.com> | 2015-05-29 14:47:21 +0530 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-07-22 08:55:45 +0200 |
| commit | 10a28644941327dc26760bc06294a5f588b46d30 (patch) | |
| tree | 3437c29440bb6f6b0dc4a6ecdbb488ca3c55f334 | |
| parent | d09e401b439859cf9435bfe363265b4322e93cd9 (diff) | |
| download | u-boot-imx-10a28644941327dc26760bc06294a5f588b46d30.zip u-boot-imx-10a28644941327dc26760bc06294a5f588b46d30.tar.gz u-boot-imx-10a28644941327dc26760bc06294a5f588b46d30.tar.bz2 | |
ls1021atwr: Enable USB IP support
Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| -rw-r--r-- | include/configs/ls1021atwr.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d0432c3..cf2aaa3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -28,6 +28,44 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* + * USB + */ + +/* + * EHCI Support - disbaled by default as + * there is no signal coming out of soc on + * this board for this controller. However, + * the silicon still has this controller, + * and anyone can use this controller by + * taking signals out on their board. + */ + +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000 |