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| author | Jagan Teki <jteki@openedev.com> | 2015-06-27 04:32:43 +0530 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2015-07-01 21:39:03 +0530 |
| commit | 075143d3cfd780efed63ad0f28a299c8bc15379f (patch) | |
| tree | 923d7675ccfcc8c7afb0a9d7e3f60d189199ff77 | |
| parent | de8230535b892d8dee768e40e91a4595d6585155 (diff) | |
| download | u-boot-imx-075143d3cfd780efed63ad0f28a299c8bc15379f.zip u-boot-imx-075143d3cfd780efed63ad0f28a299c8bc15379f.tar.gz u-boot-imx-075143d3cfd780efed63ad0f28a299c8bc15379f.tar.bz2 | |
spi: Kconfig: Add XILINX_SPI entry
Added XILINX_SPI entry on Kconfig with help description.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | drivers/spi/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 913951f..452dd4d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -54,6 +54,15 @@ config CADENCE_QSPI used to access the SPI NOR flash on platforms embedding this Cadence IP core. +config XILINX_SPI + bool "Xilinx SPI driver" + depends on DM_SPI + help + Enable the Xilinx SPI driver from the Xilinx EDK. This SPI + controller support 8 bit SPI transfers only, with or w/o FIFO. + For more info on Xilinx SPI Register Definitions and Overview + see driver file - drivers/spi/xilinx_spi.c + config ZYNQ_SPI bool "Zynq SPI driver" depends on DM_SPI && (ARCH_ZYNQ || TARGET_XILINX_ZYNQMP) |