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authorGabor Juhos <juhosg@openwrt.org>2013-05-22 03:57:38 +0000
committerTom Rini <trini@ti.com>2013-07-24 09:51:03 -0400
commit015643152aee4c333e3f95d153347f50b7e92ea7 (patch)
tree544ff1be14755d89aec2ec01868c6cd4d7885ade
parent5a4dcfac1e05f7c025a465d3372a1c1425004c2b (diff)
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MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a magic value into that register initiates a board reset. Use this feature to implement reset support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
-rw-r--r--arch/mips/include/asm/malta.h3
-rw-r--r--board/qemu-malta/qemu-malta.c11
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h
index b215164..f2bbf0f 100644
--- a/arch/mips/include/asm/malta.h
+++ b/arch/mips/include/asm/malta.h
@@ -13,4 +13,7 @@
#define MALTA_UART_BASE (MALTA_IO_PORT_BASE + 0x3f8)
+#define MALTA_RESET_BASE 0x1f000500
+#define GORESET 0x42
+
#endif /* _MIPS_ASM_MALTA_H */
diff --git a/board/qemu-malta/qemu-malta.c b/board/qemu-malta/qemu-malta.c
index 9ba711d..449da9c 100644
--- a/board/qemu-malta/qemu-malta.c
+++ b/board/qemu-malta/qemu-malta.c
@@ -8,6 +8,9 @@
#include <common.h>
+#include <asm/io.h>
+#include <asm/malta.h>
+
phys_size_t initdram(int board_type)
{
return CONFIG_SYS_MEM_SIZE;
@@ -18,3 +21,11 @@ int checkboard(void)
puts("Board: MIPS Malta CoreLV (Qemu)\n");
return 0;
}
+
+void _machine_restart(void)
+{
+ void __iomem *reset_base;
+
+ reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
+ __raw_writel(GORESET, reset_base);
+}