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| author | Thierry Reding <treding@nvidia.com> | 2015-07-27 11:45:24 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-07-28 10:30:17 -0700 |
| commit | 00f782a9f82a20b2fe4bf6c254758e6ac94ddb15 (patch) | |
| tree | 01dff9aac53b05360cf391544ed6824859defff0 | |
| parent | 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4 (diff) | |
| download | u-boot-imx-00f782a9f82a20b2fe4bf6c254758e6ac94ddb15.zip u-boot-imx-00f782a9f82a20b2fe4bf6c254758e6ac94ddb15.tar.gz u-boot-imx-00f782a9f82a20b2fe4bf6c254758e6ac94ddb15.tar.bz2 | |
ARM: tegra: Restrict usable RAM to 32-bit on 64-bit SoCs
Most peripherals on Tegra can do DMA only to the lower 32-bit
address space, even on 64-bit SoCs. This limitation is
typically overcome by the use of an IOMMU. Since the IOMMU is
not entirely trivial to set up and serves no other purpose
(I/O protection, ...) in U-Boot, restrict 64-bit Tegra SoCs to
the lower 32-bit address space for RAM. This ensures that the
physical addresses of buffers that are programmed into the
various DMA engines are valid and don't alias to lower addresses.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board2.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index ce9b695..e0d8687 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -274,3 +274,19 @@ void pad_init_mmc(struct mmc_host *host) #endif /* T30 */ } #endif /* MMC */ + +#ifdef CONFIG_ARM64 +/* + * Most hardware on 64-bit Tegra is still restricted to DMA to the lower + * 32-bits of the physical address space. Cap the maximum usable RAM area + * at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit + * boundary that most devices can address. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + if (gd->ram_top > 0x100000000) + return 0x100000000; + + return gd->ram_top; +} +#endif |