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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-07-21 14:04:23 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-07-23 23:42:34 +0900
commitf1d794531cfc1844cbe3de3c9a0c721561e6f877 (patch)
treeeb4e5ef7da3c7c6bb0637be458e7d33dda58093c
parent3365b4eb5543ae26579321da34cca42e38ac130f (diff)
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ARM: dts: UniPhier: add I2C ch4 device node for PH1-sLD3
This I2C device is used SoC-internally for controlling the DMD core. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r--arch/arm/dts/uniphier-ph1-sld3.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 2fa42a6..5e29436 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -129,6 +129,15 @@
status = "disabled";
};
+ i2c4: i2c@58600000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58600000 0x40>;
+ clock-frequency = <400000>;
+ status = "okay";
+ };
+
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";