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authorYe Li <ye.li@nxp.com>2016-02-01 10:41:31 +0800
committerStefano Babic <sbabic@denx.de>2016-02-02 21:03:59 +0100
commitd4d1dd674977fc7be30bd1f113b564247236ed60 (patch)
treea45453d861bddadc78dae655b757ce638fca09fb
parent276d3ebb883024d753cd9c69ab2fd243ffa1262e (diff)
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mx6: soc: Add ENET2 mac address support
The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li@nxp.com>
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c32
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h23
-rw-r--r--doc/README.imx65
3 files changed, 30 insertions, 30 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index bf5ae8c..ebe42b8 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -364,15 +364,29 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank->fuse_regs;
- u32 value = readl(&fuse->mac_addr_high);
- mac[0] = (value >> 8);
- mac[1] = value ;
-
- value = readl(&fuse->mac_addr_low);
- mac[2] = value >> 24 ;
- mac[3] = value >> 16 ;
- mac[4] = value >> 8 ;
- mac[5] = value ;
+ if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) &&
+ dev_id == 1) {
+ u32 value = readl(&fuse->mac_addr2);
+ mac[0] = value >> 24 ;
+ mac[1] = value >> 16 ;
+ mac[2] = value >> 8 ;
+ mac[3] = value ;
+
+ value = readl(&fuse->mac_addr1);
+ mac[4] = value >> 24 ;
+ mac[5] = value >> 16 ;
+
+ } else {
+ u32 value = readl(&fuse->mac_addr1);
+ mac[0] = (value >> 8);
+ mac[1] = value ;
+
+ value = readl(&fuse->mac_addr0);
+ mac[2] = value >> 24 ;
+ mac[3] = value >> 16 ;
+ mac[4] = value >> 8 ;
+ mac[5] = value ;
+ }
}
#endif
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index f24525e..5c45bf6 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -715,39 +715,22 @@ struct fuse_bank1_regs {
u32 rsvd7[3];
};
-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
struct fuse_bank4_regs {
u32 sjc_resp_low;
u32 rsvd0[3];
u32 sjc_resp_high;
u32 rsvd1[3];
- u32 mac_addr_low;
+ u32 mac_addr0;
u32 rsvd2[3];
- u32 mac_addr_high;
+ u32 mac_addr1;
u32 rsvd3[3];
- u32 mac_addr2;
+ u32 mac_addr2; /*For i.MX6SX and i.MX6UL*/
u32 rsvd4[7];
u32 gp1;
u32 rsvd5[3];
u32 gp2;
u32 rsvd6[3];
};
-#else
-struct fuse_bank4_regs {
- u32 sjc_resp_low;
- u32 rsvd0[3];
- u32 sjc_resp_high;
- u32 rsvd1[3];
- u32 mac_addr_low;
- u32 rsvd2[3];
- u32 mac_addr_high;
- u32 rsvd3[0xb];
- u32 gp1;
- u32 rsvd4[3];
- u32 gp2;
- u32 rsvd5[3];
-};
-#endif
struct aipstz_regs {
u32 mprot0;
diff --git a/doc/README.imx6 b/doc/README.imx6
index e26ab71..7c9a4ac 100644
--- a/doc/README.imx6
+++ b/doc/README.imx6
@@ -7,7 +7,10 @@ SoC.
-----------------------------------
1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
- 16 msbs in word 3.
+ 16 msbs in word 3[15:0].
+ For i.MX6SX and i.MX6UL, they have two MAC addresses. The second MAC address
+ is stored in fuse bank 4, with the 16 lsb in word 3[31:16] and the 32 msbs in
+ word 4.
Example: