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| author | Marek Vasut <marex@denx.de> | 2012-04-06 03:25:06 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-04-16 22:11:57 +0200 |
| commit | c6201553ba73616eed0f416f66d28c39691692bd (patch) | |
| tree | d27f306e8820c0795a7a59094c78bf7db216b05e | |
| parent | 2f002eceae44c21656b7f596624c636157ffdf1c (diff) | |
| download | u-boot-imx-c6201553ba73616eed0f416f66d28c39691692bd.zip u-boot-imx-c6201553ba73616eed0f416f66d28c39691692bd.tar.gz u-boot-imx-c6201553ba73616eed0f416f66d28c39691692bd.tar.bz2 | |
ARM926EJS: Make asm routines volatile in cache ops
We certainly don't want the compiler to reorganise the code for dcache flushing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Stefano Babic <sbabic@denx.de>
| -rw-r--r-- | arch/arm/cpu/arm926ejs/cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 4430578..07f036f 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -82,7 +82,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop) start += CONFIG_SYS_CACHELINE_SIZE; } - asm("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0)); + asm volatile("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0)); } void flush_cache(unsigned long start, unsigned long size) |