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authorStefan Agner <stefan.agner@toradex.com>2016-10-05 15:27:03 -0700
committerStefano Babic <sbabic@denx.de>2016-10-07 12:26:14 +0200
commita99546ab6294e11b71dfbeee7f2432b1f028f65d (patch)
treee22cee3db2be0ac8105d393514628e05754ce333
parent5b0d03b306b8d3010835d8b191bfc0581735021f (diff)
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dm: imx: serial: support device tree
Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--doc/device-tree-bindings/serial/mxc-serial.txt8
-rw-r--r--drivers/serial/serial_mxc.c32
2 files changed, 38 insertions, 2 deletions
diff --git a/doc/device-tree-bindings/serial/mxc-serial.txt b/doc/device-tree-bindings/serial/mxc-serial.txt
new file mode 100644
index 0000000..ede92a4
--- /dev/null
+++ b/doc/device-tree-bindings/serial/mxc-serial.txt
@@ -0,0 +1,8 @@
+NXP i.MX (MXC) UART
+
+Required properties:
+- compatible: must be "fsl,imx7d-uart"
+- reg: start address and size of the registers
+
+Optional properties:
+- fsl,dte-mode: use DTE mode
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 8545714..4fd2b1d 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -108,6 +108,8 @@
#define UTS_RXFULL (1<<3) /* RxFIFO full */
#define UTS_SOFTRST (1<<0) /* Software reset */
+DECLARE_GLOBAL_DATA_PTR;
+
#ifndef CONFIG_DM_SERIAL
#ifndef CONFIG_MXC_UART_BASE
@@ -135,8 +137,6 @@
#define UBRC 0xac /* Baud Rate Count Register */
#define UTS 0xb4 /* UART Test Register (mx31) */
-DECLARE_GLOBAL_DATA_PTR;
-
#define TXTL 2 /* reset default */
#define RXTL 1 /* reset default */
#define RFDIV 4 /* divide input clock by 2 */
@@ -347,9 +347,37 @@ static const struct dm_serial_ops mxc_serial_ops = {
.setbrg = mxc_serial_setbrg,
};
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static int mxc_serial_ofdata_to_platdata(struct udevice *dev)
+{
+ struct mxc_serial_platdata *plat = dev->platdata;
+ fdt_addr_t addr;
+
+ addr = dev_get_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ plat->reg = (struct mxc_uart *)addr;
+
+ plat->use_dte = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
+ "fsl,dte-mode");
+ return 0;
+}
+
+static const struct udevice_id mxc_serial_ids[] = {
+ { .compatible = "fsl,imx7d-uart" },
+ { }
+};
+#endif
+
U_BOOT_DRIVER(serial_mxc) = {
.name = "serial_mxc",
.id = UCLASS_SERIAL,
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+ .of_match = mxc_serial_ids,
+ .ofdata_to_platdata = mxc_serial_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct mxc_serial_platdata),
+#endif
.probe = mxc_serial_probe,
.ops = &mxc_serial_ops,
.flags = DM_FLAG_PRE_RELOC,