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author | Shaveta Leekha <shaveta@freescale.com> | 2014-02-26 16:07:37 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2014-03-07 14:50:10 -0800 |
commit | 6df82e3c0f3e1b160ff08dbf4a2e36f8c75de68e (patch) | |
tree | 2661ae2798e430eb70c4a5d02b3d09e6c26dd049 | |
parent | c7d506d4ee477368d54f226065416648be08a60d (diff) | |
download | u-boot-imx-6df82e3c0f3e1b160ff08dbf4a2e36f8c75de68e.zip u-boot-imx-6df82e3c0f3e1b160ff08dbf4a2e36f8c75de68e.tar.gz u-boot-imx-6df82e3c0f3e1b160ff08dbf4a2e36f8c75de68e.tar.bz2 |
B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks re-configuration
B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes,
add their defines in arch/powerpc/include/asm/config_mpc85xx.h
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 56587ae..0ec1417 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -667,6 +667,7 @@ #ifdef CONFIG_PPC_B4860 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4 #define CONFIG_MAX_CPUS 4 +#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 2 #define CONFIG_SYS_FSL_NUM_CC_PLLS 4 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CONFIG_SYS_NUM_FM1_DTSEC 6 @@ -679,6 +680,7 @@ #define CONFIG_SYS_FSL_SRIO_LIODN #else #define CONFIG_MAX_CPUS 2 +#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 1 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2 #define CONFIG_SYS_FSL_NUM_CC_PLLS 4 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 } |