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author | Michal Simek <michal.simek@xilinx.com> | 2015-01-14 15:36:34 +0100 |
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committer | Tom Rini <trini@ti.com> | 2015-01-14 11:37:39 -0500 |
commit | 421044b183dd1fe8e2292dee1d310af89f100213 (patch) | |
tree | 200e89c024667b638e9c96123b644930148a6016 | |
parent | 33d88183506f46ab618d1a5211268ae40df092de (diff) | |
download | u-boot-imx-421044b183dd1fe8e2292dee1d310af89f100213.zip u-boot-imx-421044b183dd1fe8e2292dee1d310af89f100213.tar.gz u-boot-imx-421044b183dd1fe8e2292dee1d310af89f100213.tar.bz2 |
doc: ARM: Use the right function name
Trivial fix.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | doc/README.arm-caches | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/README.arm-caches b/doc/README.arm-caches index f6a52e3..dbb6190 100644 --- a/doc/README.arm-caches +++ b/doc/README.arm-caches @@ -47,7 +47,7 @@ Cleanup Before Linux: - cleanup_before_linux() should flush the D-cache, invalidate I-cache, and disable MMU and caches. - The following sequence is advisable while disabling d-cache: - 1. disable_dcache() - flushes and disables d-cache + 1. dcache_disable() - flushes and disables d-cache 2. invalidate_dcache_all() - invalid any entry that came to the cache in the short period after the cache was flushed but before the cache got disabled. |