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author | Simon Glass <sjg@chromium.org> | 2014-11-14 18:18:37 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:01 -0700 |
commit | 05efc3961cf01916b32ef58a3965d46a11636e68 (patch) | |
tree | 8c111f6713bd3fe2ba43026032d33dd6320a8626 | |
parent | b021e05535c3dabc07fbac2222db535d414110dc (diff) | |
download | u-boot-imx-05efc3961cf01916b32ef58a3965d46a11636e68.zip u-boot-imx-05efc3961cf01916b32ef58a3965d46a11636e68.tar.gz u-boot-imx-05efc3961cf01916b32ef58a3965d46a11636e68.tar.bz2 |
x86: dts: Add LPC settings for link
Add some settings required to set up the LPC correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | arch/x86/dts/link.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 4520db5..28cef07 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -169,6 +169,14 @@ #address-cells = <1>; #size-cells = <1>; gen-dec = <0x800 0xfc 0x900 0xfc>; + intel,gen-dec = <0x800 0xfc 0x900 0xfc>; + intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b + 0x80 0x80 0x80 0x80>; + intel,gpi-routing = <0 0 0 0 0 0 0 2 + 1 0 0 0 0 0 0 0>; + /* Enable EC SMI source */ + intel,alt-gp-smi-enable = <0x0100>; + cros-ec@200 { compatible = "google,cros-ec"; reg = <0x204 1 0x200 1 0x880 0x80>; |