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authorYe Li <ye.li@nxp.com>2016-12-13 15:33:41 +0800
committerYe Li <ye.li@nxp.com>2016-12-14 10:16:55 +0800
commitd2192a3909be8ab9433082e7c04c917489b28e25 (patch)
tree51061236e874975c4154cd076fbdd5a9bdb510b8
parentea7429b70c1eb2cf475028ee8df2ac9ed18b3c82 (diff)
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MLK-13602-3 mx6ullevk/arm2: Enable module fuse checking for mx6ull boards
Enable the module disable fuse checking configurations, and ENET fuse checking during ENET setup. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Bai Ping <ping.bai@nxp.com>
-rw-r--r--board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c5
-rw-r--r--board/freescale/mx6ullevk/mx6ullevk.c6
-rw-r--r--include/configs/mx6ull_ddr3_arm2.h3
-rw-r--r--include/configs/mx6ullevk.h3
4 files changed, 17 insertions, 0 deletions
diff --git a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
index 58c354d..8cfe2e3 100644
--- a/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
+++ b/board/freescale/mx6ull_ddr3_arm2/mx6ull_ddr3_arm2.c
@@ -784,6 +784,8 @@ static int setup_fec(int fec_id)
int ret;
if (0 == fec_id) {
+ if (check_module_fused(MX6_MODULE_ENET1))
+ return -1;
/*
* Use 50M anatop loopback REF_CLK1 for ENET1,
* clear gpr1[13], set gpr1[17]
@@ -795,6 +797,9 @@ static int setup_fec(int fec_id)
return ret;
} else {
+ if (check_module_fused(MX6_MODULE_ENET2))
+ return -1;
+
/* clk from phy, set gpr1[14], clear gpr1[18]*/
clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK);
diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
index fcb1090..d0b0496 100644
--- a/board/freescale/mx6ullevk/mx6ullevk.c
+++ b/board/freescale/mx6ullevk/mx6ullevk.c
@@ -689,6 +689,9 @@ static int setup_fec(int fec_id)
int ret;
if (fec_id == 0) {
+ if (check_module_fused(MX6_MODULE_ENET1))
+ return -1;
+
/*
* Use 50M anatop loopback REF_CLK1 for ENET1,
* clear gpr1[13], set gpr1[17].
@@ -696,6 +699,9 @@ static int setup_fec(int fec_id)
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
} else {
+ if (check_module_fused(MX6_MODULE_ENET2))
+ return -1;
+
/*
* Use 50M anatop loopback REF_CLK2 for ENET2,
* clear gpr1[14], set gpr1[18].
diff --git a/include/configs/mx6ull_ddr3_arm2.h b/include/configs/mx6ull_ddr3_arm2.h
index 9325d33..216c1e4 100644
--- a/include/configs/mx6ull_ddr3_arm2.h
+++ b/include/configs/mx6ull_ddr3_arm2.h
@@ -126,4 +126,7 @@
#define CONFIG_WAVEFORM_BUF_SIZE 0x400000
#endif
+#define CONFIG_MODULE_FUSE
+#define CONFIG_OF_SYSTEM_SETUP
+
#endif
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index ad8afad..2c72687 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -368,6 +368,9 @@
#define CONFIG_IOMUX_LPSR
+#define CONFIG_MODULE_FUSE
+#define CONFIG_OF_SYSTEM_SETUP
+
#if defined(CONFIG_ANDROID_SUPPORT)
#include "mx6ullevk_android.h"
#endif