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ENGR00331799-6: ASoC: fsl_spdif: add spba clk support

spdif need to enable the spba clock, when sdma is using share peripheral
script. If don't enable it, may cause the read/write wrong data from/to
registers.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
isee-imx_3.14.28.y
Shengjiu Wang 6 years ago
committed by Nitin Garg
parent
commit
927e41ef7e
1 changed files with 15 additions and 0 deletions
  1. +15
    -0
      sound/soc/fsl/fsl_spdif.c

+ 15
- 0
sound/soc/fsl/fsl_spdif.c View File

@ -108,6 +108,7 @@ struct fsl_spdif_priv {
struct clk *rxclk;
struct clk *coreclk;
struct clk *sysclk;
struct clk *dmaclk;
struct snd_dmaengine_dai_dma_data dma_params_tx;
struct snd_dmaengine_dai_dma_data dma_params_rx;
@ -457,6 +458,12 @@ static int fsl_spdif_startup(struct snd_pcm_substream *substream,
return ret;
}
ret = clk_prepare_enable(spdif_priv->dmaclk);
if (ret) {
dev_err(&pdev->dev, "failed to enable dma clock\n");
return ret;
}
ret = spdif_softreset(spdif_priv);
if (ret) {
dev_err(&pdev->dev, "failed to soft reset\n");
@ -523,6 +530,7 @@ static void fsl_spdif_shutdown(struct snd_pcm_substream *substream,
spdif_intr_status_clear(spdif_priv);
regmap_update_bits(regmap, REG_SPDIF_SCR,
SCR_LOW_POWER, SCR_LOW_POWER);
clk_disable_unprepare(spdif_priv->dmaclk);
clk_disable_unprepare(spdif_priv->coreclk);
}
}
@ -1207,6 +1215,13 @@ static int fsl_spdif_probe(struct platform_device *pdev)
return PTR_ERR(spdif_priv->coreclk);
}
/* Get dma clock for dma script operation */
spdif_priv->dmaclk = devm_clk_get(&pdev->dev, "dma");
if (IS_ERR(spdif_priv->dmaclk)) {
dev_err(&pdev->dev, "no dma clock in devicetree\n");
return PTR_ERR(spdif_priv->dmaclk);
}
/* Select clock source for rx/tx clock */
spdif_priv->rxclk = devm_clk_get(&pdev->dev, "rxtx1");
if (IS_ERR(spdif_priv->rxclk)) {


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