ENGR00320241 ASoC: fsl_spdif: Complete the volatile register list
Not only SIS but also other read-only or write-only reigsters should be marked
as volatile register so as not to let regcache cache them. So this patch just
adds those missing registers.
Signed-off-by:
Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 56ad235ba23274fc05422ad4b13153d1c56801c4)
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