1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Integer compare instructions: cmpw, cmplw
*
* To verify these instructions the test runs them with
* different combinations of operands, reads the condition
* register value and compares it with the expected one.
* The test contains a pre-built table
* containing the description of each test case: the instruction,
* the values of the operands, the condition field to save
* the result in and the expected result.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CFG_POST_CPU
extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2);
static struct cpu_post_cmp_s
{
ulong cmd;
ulong op1;
ulong op2;
ulong cr;
ulong res;
} cpu_post_cmp_table[] =
{
{
OP_CMPW,
123,
123,
2,
0x02
},
{
OP_CMPW,
123,
133,
3,
0x08
},
{
OP_CMPW,
123,
-133,
4,
0x04
},
{
OP_CMPLW,
123,
123,
2,
0x02
},
{
OP_CMPLW,
123,
-133,
3,
0x08
},
{
OP_CMPLW,
123,
113,
4,
0x04
},
};
static unsigned int cpu_post_cmp_size =
sizeof (cpu_post_cmp_table) / sizeof (struct cpu_post_cmp_s);
int cpu_post_test_cmp (void)
{
int ret = 0;
unsigned int i;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_cmp_size && ret == 0; i++)
{
struct cpu_post_cmp_s *test = cpu_post_cmp_table + i;
unsigned long code[] =
{
ASM_2C(test->cmd, test->cr, 3, 4),
ASM_MFCR(3),
ASM_BLR
};
ulong res;
cpu_post_exec_12 (code, & res, test->op1, test->op2);
ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
if (ret != 0)
{
post_log ("Error at cmp test %d !\n", i);
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
