blob: e2270cd2ea4f1558034e21276ed03af4ee0b5d84 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
|
/*
* (C) Copyright 2012 Xilinx
* (C) Copyright 2014 Digilent Inc.
*
* Configuration for Zynq Development Board - ZYBO
* See zynq-common.h for Zynq common configs
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQ_ZYBO_H
#define __CONFIG_ZYNQ_ZYBO_H
#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_BOOT_FREEBSD
/* Define ZYBO PS Clock Frequency to 50MHz */
#define CONFIG_ZYNQ_PS_CLK_FREQ 50000000UL
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_ZYBO_H */
|
