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/*
* Copyright (C) 2012-2014 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX6QSABRESD_CONFIG_H
#define __MX6QSABRESD_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_MACH_TYPE 3980
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
#include "mx6sabre_common.h"
/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */
#ifdef CONFIG_SYS_USE_SPINOR
#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(4, 9)<<8))
#endif
/* Framebuffer */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 264000000
#define CONFIG_IMX_HDMI
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
/*#define CONFIG_SPLASH_SCREEN*/
/*#define CONFIG_MXC_EPDC*/
/*
* SPLASH SCREEN Configs
*/
#if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_MXC_EPDC)
/*
* Framebuffer and LCD
*/
#define CONFIG_CMD_BMP
#define CONFIG_LCD
#define CONFIG_FB_BASE (CONFIG_SYS_TEXT_BASE + 0x300000)
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#undef LCD_TEST_PATTERN
/* #define CONFIG_SPLASH_IS_IN_MMC 1 */
#define LCD_BPP LCD_MONOCHROME
/* #define CONFIG_SPLASH_SCREEN_ALIGN 1 */
#define CONFIG_WORKING_BUF_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
#define CONFIG_WAVEFORM_BUF_ADDR (CONFIG_SYS_TEXT_BASE + 0x200000)
#define CONFIG_WAVEFORM_FILE_OFFSET 0x600000
#define CONFIG_WAVEFORM_FILE_SIZE 0xF0A00
#define CONFIG_WAVEFORM_FILE_IN_MMC
#ifdef CONFIG_SPLASH_IS_IN_MMC
#define CONFIG_SPLASH_IMG_OFFSET 0x4c000
#define CONFIG_SPLASH_IMG_SIZE 0x19000
#endif
#endif /* CONFIG_SPLASH_SCREEN && CONFIG_MXC_EPDC */
#endif /* __MX6QSABRESD_CONFIG_H */
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