1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
|
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <watchdog.h>
#include <asm/io.h>
#include <serial.h>
#include <linux/compiler.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#define US1_TDRE (1 << 7)
#define US1_RDRF (1 << 5)
#define US1_OR (1 << 3)
#define UC2_TE (1 << 3)
#define UC2_RE (1 << 2)
#define CFIFO_TXFLUSH (1 << 7)
#define CFIFO_RXFLUSH (1 << 6)
#define SFIFO_RXOF (1 << 2)
#define SFIFO_RXUF (1 << 0)
DECLARE_GLOBAL_DATA_PTR;
struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
static void lpuart_serial_setbrg(void)
{
u32 clk = mxc_get_clock(MXC_UART_CLK);
u16 sbr;
if (!gd->baudrate)
gd->baudrate = CONFIG_BAUDRATE;
sbr = (u16)(clk / (16 * gd->baudrate));
/* place adjustment later - n/32 BRFA */
__raw_writeb(sbr >> 8, &base->ubdh);
__raw_writeb(sbr & 0xff, &base->ubdl);
}
static int lpuart_serial_getc(void)
{
while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR)))
WATCHDOG_RESET();
barrier();
return __raw_readb(&base->ud);
}
static void lpuart_serial_putc(const char c)
{
if (c == '\n')
serial_putc('\r');
while (!(__raw_readb(&base->us1) & US1_TDRE))
WATCHDOG_RESET();
__raw_writeb(c, &base->ud);
}
/*
* Test whether a character is in the RX buffer
*/
static int lpuart_serial_tstc(void)
{
if (__raw_readb(&base->urcfifo) == 0)
return 0;
return 1;
}
/*
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
static int lpuart_serial_init(void)
{
u8 ctrl;
ctrl = __raw_readb(&base->uc2);
ctrl &= ~UC2_RE;
ctrl &= ~UC2_TE;
__raw_writeb(ctrl, &base->uc2);
__raw_writeb(0, &base->umodem);
__raw_writeb(0, &base->uc1);
/* Disable FIFO and flush buffer */
__raw_writeb(0x0, &base->upfifo);
__raw_writeb(0x0, &base->utwfifo);
__raw_writeb(0x1, &base->urwfifo);
__raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo);
/* provide data bits, parity, stop bit, etc */
serial_setbrg();
__raw_writeb(UC2_RE | UC2_TE, &base->uc2);
return 0;
}
static struct serial_device lpuart_serial_drv = {
.name = "lpuart_serial",
.start = lpuart_serial_init,
.stop = NULL,
.setbrg = lpuart_serial_setbrg,
.putc = lpuart_serial_putc,
.puts = default_serial_puts,
.getc = lpuart_serial_getc,
.tstc = lpuart_serial_tstc,
};
void lpuart_serial_initialize(void)
{
serial_register(&lpuart_serial_drv);
}
__weak struct serial_device *default_serial_console(void)
{
return &lpuart_serial_drv;
}
|
