summaryrefslogtreecommitdiff
path: root/drivers/gpio/tegra2_gpio.c
blob: 22669b6160e6dd27c20e1a4ebf9318055cf83bc4 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
/*
 * NVIDIA Tegra2 GPIO handling.
 *  (C) Copyright 2010,2011
 *  NVIDIA Corporation <www.nvidia.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
 * Tom Warren (twarren@nvidia.com)
 */

#include <common.h>
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/arch/tegra2.h>
#include <asm/gpio.h>

enum {
	TEGRA2_CMD_INFO,
	TEGRA2_CMD_PORT,
	TEGRA2_CMD_OUTPUT,
	TEGRA2_CMD_INPUT,
};

static struct gpio_names {
	char name[GPIO_NAME_SIZE];
} gpio_names[MAX_NUM_GPIOS];

static char *get_name(int i)
{
	return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
}

/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */
static int get_config(int gp)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	u32 u;
	int type;

	u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
	type =  (u >> GPIO_BIT(gp)) & 1;

	debug("get_config: port = %d, bit = %d is %s\n",
		GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");

	return type;
}

/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */
static void set_config(int gp, int type)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	u32 u;

	debug("set_config: port = %d, bit = %d, %s\n",
		GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");

	u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
	if (type)				/* GPIO */
		u |= 1 << GPIO_BIT(gp);
	else
		u &= ~(1 << GPIO_BIT(gp));
	writel(u, &bank->gpio_config[GPIO_PORT(gp)]);
}

/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */
static int get_direction(int gp)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	u32 u;
	int dir;

	u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
	dir =  (u >> GPIO_BIT(gp)) & 1;

	debug("get_direction: port = %d, bit = %d, %s\n",
		GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN");

	return dir;
}

/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */
static void set_direction(int gp, int output)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	u32 u;

	debug("set_direction: port = %d, bit = %d, %s\n",
		GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN");

	u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
	if (output)
		u |= 1 << GPIO_BIT(gp);
	else
		u &= ~(1 << GPIO_BIT(gp));
	writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]);
}

/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */
static void set_level(int gp, int high)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	u32 u;

	debug("set_level: port = %d, bit %d == %d\n",
		GPIO_FULLPORT(gp), GPIO_BIT(gp), high);

	u = readl(&bank->gpio_out[GPIO_PORT(gp)]);
	if (high)
		u |= 1 << GPIO_BIT(gp);
	else
		u &= ~(1 << GPIO_BIT(gp));
	writel(u, &bank->gpio_out[GPIO_PORT(gp)]);
}

/*
 * Generic_GPIO primitives.
 */

int gpio_request(int gp, const char *label)
{
	if (gp >= MAX_NUM_GPIOS)
		return -1;

	if (label != NULL) {
		strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
		gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
	}

	/* Configure as a GPIO */
	set_config(gp, 1);

	return 0;
}

void gpio_free(int gp)
{
}

/* read GPIO OUT value of pin 'gp' */
static int gpio_get_output_value(int gp)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	int val;

	debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
		gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));

	val = readl(&bank->gpio_out[GPIO_PORT(gp)]);

	return (val >> GPIO_BIT(gp)) & 1;
}

void gpio_toggle_value(int gp)
{
	gpio_set_value(gp, !gpio_get_output_value(gp));
}

/* set GPIO pin 'gp' as an input */
int gpio_direction_input(int gp)
{
	debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
		gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));

	/* Configure GPIO direction as input. */
	set_direction(gp, 0);

	return 0;
}

/* set GPIO pin 'gp' as an output, with polarity 'value' */
int gpio_direction_output(int gp, int value)
{
	debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
		gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW");

	/* Configure GPIO output value. */
	set_level(gp, value);

	/* Configure GPIO direction as output. */
	set_direction(gp, 1);

	return 0;
}

/* read GPIO IN value of pin 'gp' */
int gpio_get_value(int gp)
{
	struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
	struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
	int val;

	debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
		gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));

	val = readl(&bank->gpio_in[GPIO_PORT(gp)]);

	return (val >> GPIO_BIT(gp)) & 1;
}

/* write GPIO OUT value to pin 'gp' */
void gpio_set_value(int gp, int value)
{
	debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
		gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value);

	/* Configure GPIO output value. */
	set_level(gp, value);
}

/*
 * Display Tegra GPIO information
 */
void gpio_info(void)
{
	int c, type;

	for (c = 0; c < MAX_NUM_GPIOS; c++) {
		type = get_config(c);		/* GPIO, not SFPIO */
		if (type) {
			printf("GPIO_%d:\t%s is an %s, ", c,
				get_name(c),
				get_direction(c) ? "OUTPUT" : "INPUT");
			if (get_direction(c))
				printf("value = %d", gpio_get_output_value(c));
			else
				printf("value = %d", gpio_get_value(c));
			printf("\n");
		} else
			continue;
	}
}