1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
|
/*
* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
* Scott McNutt <smcnutt@psyent.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#if !defined(CONFIG_IDENT_STRING)
#define CONFIG_IDENT_STRING ""
#endif
#define STATUS_INIT 0x8600 /* IE=1, IPRI=2 */
/*************************************************************************
* RESTART
************************************************************************/
.text
.global _start
_start:
bsr 0f
nop
.long _start
/* GERMS -- The "standard-32" configuration GERMS monitor looks
* for the string "Nios" at flash_base + 0xc (actually it only
* tests for 'N', 'i'). You can leave support for this in place
* as it's only a few words.
*/
. = _start + 0x000c
.string "Nios"
.align 4
0:
/*
* Early setup -- set cwp = HI_LIMIT, IPRI = 2, IE = 1 to
* enable underflow exceptions. Disable cache.
* NOTE: %o7 has return addr -- save in %g7 use later.
*/
mov %g7, %o7
pfx 2 /* WVALID */
rdctl %g0
lsri %g0, 1
pfx %hi(STATUS_INIT)
or %g0, %lo(STATUS_INIT)
wrctl %g0 /* update status */
nop
/*
* STACK
*/
pfx %hi(CFG_INIT_SP)
movi %sp, %lo(CFG_INIT_SP)
pfx %xhi(CFG_INIT_SP)
movhi %sp, %xlo(CFG_INIT_SP)
mov %fp, %sp
pfx %hi(4*16)
subi %sp, %lo(4*16) /* Space for reg window mgmt */
/*
* RELOCATE -- %g7 has return addr from bsr at _start.
*/
pfx %hi(__u_boot_cmd_end)
movi %g5, %lo(__u_boot_cmd_end)
pfx %xhi(__u_boot_cmd_end)
movhi %g5, %xlo(__u_boot_cmd_end) /* %g5 <- end address */
lsli %g7, 1 /* mem = retaddr << 1 */
mov %g6, %g7
subi %g6, 4 /* %g6 <- src addr */
ld %g7, [%g7] /* %g7 <- dst addr */
1: cmp %g7, %g5
skps cc_nz
br 2f
nop /* delay slot */
ld %g0, [%g6]
addi %g6, 4 /* src++ */
st [%g7], %g0
addi %g7, 4 /* dst++ */
br 1b
nop /* delay slot */
2:
/*
* Jump to relocation address
*/
pfx %hi(reloc@h)
movi %g0, %lo(reloc@h)
pfx %xhi(reloc@h)
movhi %g0, %xlo(reloc@h)
jmp %g0
reloc:
/*
* CLEAR BSS
*/
pfx %hi(__bss_end)
movi %g5, %lo(__bss_end)
pfx %xhi(__bss_end)
movhi %g5, %xlo(__bss_end) /* %g5 <- end address */
pfx %hi(__bss_start)
movi %g7, %lo(__bss_start)
pfx %xhi(__bss_start)
movhi %g7, %xlo(__bss_start) /* %g7 <- end address */
movi %g0, 0
3: cmp %g7, %g5
skps cc_nz
br 4f
nop /* delay slot */
st [%g7], %g0
addi %g7, 4 /* (delay slot) dst++ */
br 3b
nop /* delay slot */
4:
/*
* Call board_init -- never returns
*/
pfx %hi(board_init@h)
movi %g1, %lo(board_init@h)
pfx %xhi(board_init@h)
movhi %g1, %xlo(board_init@h)
call %g1
nop /* Delaly slot */
/* NEVER RETURNS */
/*
* dly_clks -- Nios doesn't have a time/clk reference for simple
* delay loops, so we do our best by counting instruction cycles.
* A control register that counts system clock cycles would be
* a handy feature -- hint for Altera ;-)
*/
.globl dly_clks
/* Each loop is 4 instructions as delay slot is always
* executed. Each instruction is approximately 4 clocks
* (according to some lame info from Altera). So ...
* ... each loop is about 16 clocks.
*/
dly_clks:
lsri %o0, 4 /* cnt/16 */
8: skprnz %o0
br 9f
subi %o0, 1 /* cnt--, Delay slot */
br 8b
nop
9: lret
nop /* Delay slot */
.data
.globl version_string
version_string:
.ascii U_BOOT_VERSION
.ascii " (", __DATE__, " - ", __TIME__, ")"
.ascii CONFIG_IDENT_STRING, "\0"
|
