1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
|
/*
* (C) Copyright 2000-2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc8xx.h>
#include <mpc8xx_irq.h>
#include <asm/processor.h>
#include <commproc.h>
/************************************************************************/
/*
* CPM interrupt vector functions.
*/
struct interrupt_action {
interrupt_handler_t *handler;
void *arg;
};
static struct interrupt_action cpm_vecs[CPMVEC_NR];
static struct interrupt_action irq_vecs[NR_IRQS];
static void cpm_interrupt_init (void);
static void cpm_interrupt (void *regs);
/************************************************************************/
int interrupt_init_cpu (unsigned *decrementer_count)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
*decrementer_count = get_tbclk () / CFG_HZ;
/* disable all interrupts */
immr->im_siu_conf.sc_simask = 0;
/* Configure CPM interrupts */
cpm_interrupt_init ();
return (0);
}
/************************************************************************/
/*
* Handle external interrupts
*/
void external_interrupt (struct pt_regs *regs)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
int irq;
ulong simask, newmask;
ulong vec, v_bit;
/*
* read the SIVEC register and shift the bits down
* to get the irq number
*/
vec = immr->im_siu_conf.sc_sivec;
irq = vec >> 26;
v_bit = 0x80000000UL >> irq;
/*
* Read Interrupt Mask Register and Mask Interrupts
*/
simask = immr->im_siu_conf.sc_simask;
newmask = simask & (~(0xFFFF0000 >> irq));
immr->im_siu_conf.sc_simask = newmask;
if (!(irq & 0x1)) { /* External Interrupt ? */
ulong siel;
/*
* Read Interrupt Edge/Level Register
*/
siel = immr->im_siu_conf.sc_siel;
if (siel & v_bit) { /* edge triggered interrupt ? */
/*
* Rewrite SIPEND Register to clear interrupt
*/
immr->im_siu_conf.sc_sipend = v_bit;
}
}
if (irq_vecs[irq].handler != NULL) {
irq_vecs[irq].handler (irq_vecs[irq].arg);
} else {
printf ("\nBogus External Interrupt IRQ %d Vector %ld\n",
irq, vec);
/* turn off the bogus interrupt to avoid it from now */
simask &= ~v_bit;
}
/*
* Re-Enable old Interrupt Mask
*/
immr->im_siu_conf.sc_simask = simask;
}
/************************************************************************/
/*
* CPM interrupt handler
*/
static void cpm_interrupt (void *regs)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
uint vec;
/*
* Get the vector by setting the ACK bit
* and then reading the register.
*/
immr->im_cpic.cpic_civr = 1;
vec = immr->im_cpic.cpic_civr;
vec >>= 11;
if (cpm_vecs[vec].handler != NULL) {
(*cpm_vecs[vec].handler) (cpm_vecs[vec].arg);
} else {
immr->im_cpic.cpic_cimr &= ~(1 << vec);
printf ("Masking bogus CPM interrupt vector 0x%x\n", vec);
}
/*
* After servicing the interrupt,
* we have to remove the status indicator.
*/
immr->im_cpic.cpic_cisr |= (1 << vec);
}
/*
* The CPM can generate the error interrupt when there is a race
* condition between generating and masking interrupts. All we have
* to do is ACK it and return. This is a no-op function so we don't
* need any special tests in the interrupt handler.
*/
static void cpm_error_interrupt (void *dummy)
{
}
/************************************************************************/
/*
* Install and free an interrupt handler
*/
void irq_install_handler (int vec, interrupt_handler_t * handler,
void *arg)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
if ((vec & CPMVEC_OFFSET) != 0) {
/* CPM interrupt */
vec &= 0xffff;
if (cpm_vecs[vec].handler != NULL) {
printf ("CPM interrupt 0x%x replacing 0x%x\n",
(uint) handler,
(uint) cpm_vecs[vec].handler);
}
cpm_vecs[vec].handler = handler;
cpm_vecs[vec].arg = arg;
immr->im_cpic.cpic_cimr |= (1 << vec);
#if 0
printf ("Install CPM interrupt for vector %d ==> %p\n",
vec, handler);
#endif
} else {
/* SIU interrupt */
if (irq_vecs[vec].handler != NULL) {
printf ("SIU interrupt %d 0x%x replacing 0x%x\n",
vec,
(uint) handler,
(uint) cpm_vecs[vec].handler);
}
irq_vecs[vec].handler = handler;
irq_vecs[vec].arg = arg;
immr->im_siu_conf.sc_simask |= 1 << (31 - vec);
#if 0
printf ("Install SIU interrupt for vector %d ==> %p\n",
vec, handler);
#endif
}
}
void irq_free_handler (int vec)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
if ((vec & CPMVEC_OFFSET) != 0) {
/* CPM interrupt */
vec &= 0xffff;
#if 0
printf ("Free CPM interrupt for vector %d ==> %p\n",
vec, cpm_vecs[vec].handler);
#endif
immr->im_cpic.cpic_cimr &= ~(1 << vec);
cpm_vecs[vec].handler = NULL;
cpm_vecs[vec].arg = NULL;
} else {
/* SIU interrupt */
#if 0
printf ("Free CPM interrupt for vector %d ==> %p\n",
vec, cpm_vecs[vec].handler);
#endif
immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec));
irq_vecs[vec].handler = NULL;
irq_vecs[vec].arg = NULL;
}
}
/************************************************************************/
static void cpm_interrupt_init (void)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/*
* Initialize the CPM interrupt controller.
*/
immr->im_cpic.cpic_cicr =
(CICR_SCD_SCC4 |
CICR_SCC_SCC3 |
CICR_SCB_SCC2 |
CICR_SCA_SCC1) | ((CPM_INTERRUPT / 2) << 13) | CICR_HP_MASK;
immr->im_cpic.cpic_cimr = 0;
/*
* Install the error handler.
*/
irq_install_handler (CPMVEC_ERROR, cpm_error_interrupt, NULL);
immr->im_cpic.cpic_cicr |= CICR_IEN;
/*
* Install the cpm interrupt handler
*/
irq_install_handler (CPM_INTERRUPT, cpm_interrupt, NULL);
}
/************************************************************************/
/*
* timer_interrupt - gets called when the decrementer overflows,
* with interrupts disabled.
* Trivial implementation - no need to be really accurate.
*/
void timer_interrupt_cpu (struct pt_regs *regs)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#if 0
printf ("*** Timer Interrupt *** ");
#endif
/* Reset Timer Expired and Timers Interrupt Status */
immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
__asm__ ("nop");
#ifdef CONFIG_MPC866_et_al
immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
#else
immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
#endif
}
/************************************************************************/
|
