1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
|
/*
* Copyright 2004 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Change log:
*
* 20050101: Eran Liberty (liberty@freescale.com)
* Initial file creating (porting from 85XX & 8260)
*/
/*
* CPU specific code for the MPC83xx family.
*
* Derived from the MPC8260 and MPC85xx.
*/
#include <common.h>
#include <watchdog.h>
#include <command.h>
#include <mpc83xx.h>
#include <ft_build.h>
#include <asm/processor.h>
int checkcpu(void)
{
DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->cpu_clk;
u32 pvr = get_pvr();
char buf[32];
if ((pvr & 0xFFFF0000) != PVR_83xx) {
puts("Not MPC83xx Family!!!\n");
return -1;
}
puts("CPU: MPC83xx, ");
switch(pvr) {
case PVR_8349_REV10:
break;
case PVR_8349_REV11:
break;
default:
puts("Rev: Unknown\n");
return -1; /* Not sure what this is */
}
printf("Rev: %d.%d at %s MHz\n", (pvr & 0xf0) >> 4,
(pvr & 0x0f), strmhz(buf, clock));
return 0;
}
void upmconfig (uint upm, uint *table, uint size)
{
hang(); /* FIXME: upconfig() needed? */
}
int
do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
ulong msr;
#ifndef MPC83xx_RESET
ulong addr;
#endif
volatile immap_t *immap = (immap_t *) CFG_IMMRBAR;
#ifdef MPC83xx_RESET
/* Interrupts and MMU off */
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
msr &= ~( MSR_EE | MSR_IR | MSR_DR);
__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
/* enable Reset Control Reg */
immap->reset.rpr = 0x52535445;
/* confirm Reset Control Reg is enabled */
while(!((immap->reset.rcer) & RCER_CRE));
printf("Resetting the board.");
printf("\n");
udelay(200);
/* perform reset, only one bit */
immap->reset.rcr = RCR_SWHR;
#else /* ! MPC83xx_RESET */
immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */
/* Interrupts and MMU off */
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
/*
* Trying to execute the next instruction at a non-existing address
* should cause a machine check, resulting in reset
*/
addr = CFG_RESET_ADDRESS;
printf("resetting the board.");
printf("\n");
((void (*)(void)) addr) ();
#endif /* MPC83xx_RESET */
return 1;
}
/*
* Get timebase clock frequency (like cpu_clk in Hz)
*/
unsigned long get_tbclk(void)
{
DECLARE_GLOBAL_DATA_PTR;
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
return tbclk;
}
#if defined(CONFIG_WATCHDOG)
void watchdog_reset (void)
{
hang(); /* FIXME: implement watchdog_reset()? */
}
#endif /* CONFIG_WATCHDOG */
#if defined(CONFIG_OF_FLAT_TREE)
void
ft_cpu_setup(void *blob, bd_t *bd)
{
u32 *p;
int len;
ulong clock;
clock = bd->bi_busfreq;
p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len);
if (p != NULL)
*p = cpu_to_be32(clock);
p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len);
if (p != NULL)
*p = cpu_to_be32(clock);
p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len);
if (p != NULL)
*p = cpu_to_be32(clock);
p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len);
if (p != NULL)
*p = cpu_to_be32(clock);
#ifdef CONFIG_MPC83XX_TSEC1
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/address", &len);
memcpy(p, bd->bi_enetaddr, 6);
#endif
#ifdef CONFIG_MPC83XX_TSEC2
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/address", &len);
memcpy(p, bd->bi_enet1addr, 6);
#endif
}
#endif
|
