1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
|
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2009 Freescale Semiconductor
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/errno.h>
#include <asm/arch/mx25-regs.h>
static u32 mx25_decode_pll(u32 reg)
{
u32 mfi = (reg >> 10) & 0xf;
u32 mfn = reg & 0x3ff;
u32 mfd = (reg >> 16) & 0x3ff;
u32 pd = (reg >> 26) & 0xf;
u32 ref_clk = PLL_REF_CLK;
mfi = mfi <= 5 ? 5 : mfi;
mfd += 1;
pd += 1;
return ((2 * (ref_clk >> 10) * (mfi * mfd + mfn)) /
(mfd * pd)) << 10;
}
static u32 mx25_get_mcu_main_clk(void)
{
u32 cctl = __REG(CCM_CCTL);
u32 ret_val = mx25_decode_pll(__REG(CCM_MPCTL));
if (cctl & CRM_CCTL_ARM_SRC) {
ret_val *= 3;
ret_val /= 4;
}
return ret_val;
}
static u32 mx25_get_ahb_clk(void)
{
u32 cctl = __REG(CCM_CCTL);
u32 ahb_div = ((cctl >> CRM_CCTL_AHB_OFFSET) & 3) + 1;
return mx25_get_mcu_main_clk()/ahb_div;
}
unsigned int mx25_get_ipg_clk(void)
{
return mx25_get_ahb_clk()/2;
}
unsigned int mx25_get_cspi_clk(void)
{
return mx25_get_ipg_clk();
}
void mx25_dump_clocks(void)
{
u32 cpufreq = mx25_get_mcu_main_clk();
printf("mx25 cpu clock: %dMHz\n", cpufreq / 1000000);
printf("ipg clock : %dHz\n", mx25_get_ipg_clk());
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return mx25_get_mcu_main_clk();
case MXC_AHB_CLK:
return mx25_get_ahb_clk();
break;
case MXC_IPG_PERCLK:
case MXC_IPG_CLK:
return mx25_get_ipg_clk();
case MXC_CSPI_CLK:
return mx25_get_cspi_clk();
case MXC_UART_CLK:
break;
}
return -1;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
printf("CPU: Freescale i.MX25 at %d MHz\n",
mx25_get_mcu_main_clk() / 1000000);
return 0;
}
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
int rc = -ENODEV;
#if defined(CONFIG_MXC_FEC)
rc = mxc_fec_initialize(bis);
#endif
return rc;
}
#endif
|